From: Nils Forssén Date: Tue, 23 Apr 2024 12:42:58 +0000 (+0200) Subject: Pushed to git X-Git-Url: https://gitweb.forssennils.se/?a=commitdiff_plain;h=1681064530441d5a59ed19415379d338711c8b19;p=dynamit.git Pushed to git --- 1681064530441d5a59ed19415379d338711c8b19 diff --git a/3d/FLAP.stl b/3d/FLAP.stl new file mode 100644 index 0000000..a3b4c8c Binary files /dev/null and b/3d/FLAP.stl differ diff --git a/3d/MAIN.stl b/3d/MAIN.stl new file mode 100644 index 0000000..394f3a3 Binary files /dev/null and b/3d/MAIN.stl differ diff --git a/firmware/.vs/dynamit/v14/-Nils-Laptop.atsuo b/firmware/.vs/dynamit/v14/-Nils-Laptop.atsuo new file mode 100644 index 0000000..96d4dca Binary files /dev/null and b/firmware/.vs/dynamit/v14/-Nils-Laptop.atsuo differ diff --git a/firmware/.vs/dynamit/v14/.atsuo b/firmware/.vs/dynamit/v14/.atsuo new file mode 100644 index 0000000..98e551b Binary files /dev/null and b/firmware/.vs/dynamit/v14/.atsuo differ diff --git a/firmware/Debug/Makefile b/firmware/Debug/Makefile new file mode 100644 index 0000000..4fffc4a --- /dev/null +++ b/firmware/Debug/Makefile @@ -0,0 +1,127 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +SHELL := cmd.exe +RM := rm -rf + +USER_OBJS := + +LIBS := +PROJ := + +O_SRCS := +C_SRCS := +S_SRCS := +S_UPPER_SRCS := +OBJ_SRCS := +ASM_SRCS := +PREPROCESSING_SRCS := +OBJS := +OBJS_AS_ARGS := +C_DEPS := +C_DEPS_AS_ARGS := +EXECUTABLES := +OUTPUT_FILE_PATH := +OUTPUT_FILE_PATH_AS_ARGS := +AVR_APP_PATH :=$$$AVR_APP_PATH$$$ +QUOTE := " +ADDITIONAL_DEPENDENCIES:= +OUTPUT_FILE_DEP:= +LIB_DEP:= +LINKER_SCRIPT_DEP:= + +# Every subdirectory with source files must be described here +SUBDIRS := + + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../main.c + + +PREPROCESSING_SRCS += + + +ASM_SRCS += + + +OBJS += \ +main.o + +OBJS_AS_ARGS += \ +main.o + +C_DEPS += \ +main.d + +C_DEPS_AS_ARGS += \ +main.d + +OUTPUT_FILE_PATH +=dynamit.elf + +OUTPUT_FILE_PATH_AS_ARGS +=dynamit.elf + +ADDITIONAL_DEPENDENCIES:= + +OUTPUT_FILE_DEP:= ./makedep.mk + +LIB_DEP+= + +LINKER_SCRIPT_DEP+= + + +# AVR32/GNU C Compiler +./main.o: .././main.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include" -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g2 -Wall -mmcu=attiny2313 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + + + + +# AVR32/GNU Preprocessing Assembler + + + +# AVR32/GNU Assembler + + + + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +# Add inputs and outputs from these tool invocations to the build variables + +# All Target +all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES) + +$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP) + @echo Building target: $@ + @echo Invoking: AVR/GNU Linker : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="dynamit.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mmcu=attiny2313 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313" + @echo Finished building target: $@ + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "dynamit.elf" "dynamit.hex" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "dynamit.elf" "dynamit.eep" || exit 0 + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "dynamit.elf" > "dynamit.lss" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "dynamit.elf" "dynamit.srec" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "dynamit.elf" + + + + + + + +# Other Targets +clean: + -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES) + -$(RM) $(C_DEPS_AS_ARGS) + rm -rf "dynamit.elf" "dynamit.a" "dynamit.hex" "dynamit.lss" "dynamit.eep" "dynamit.map" "dynamit.srec" "dynamit.usersignatures" + \ No newline at end of file diff --git a/firmware/Debug/dynamit.eep b/firmware/Debug/dynamit.eep new file mode 100644 index 0000000..1996e8f --- /dev/null +++ b/firmware/Debug/dynamit.eep @@ -0,0 +1 @@ +:00000001FF diff --git a/firmware/Debug/dynamit.elf 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00000094 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .data 00000018 00800060 00000744 000007d8 2**0 + CONTENTS, ALLOC, LOAD, DATA + 2 .bss 00000003 00800078 00800078 000007f0 2**0 + ALLOC + 3 .comment 00000030 00000000 00000000 000007f0 2**0 + CONTENTS, READONLY + 4 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 00000820 2**2 + CONTENTS, READONLY + 5 .debug_aranges 00000050 00000000 00000000 00000860 2**0 + CONTENTS, READONLY, DEBUGGING + 6 .debug_info 0000075e 00000000 00000000 000008b0 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_abbrev 0000059b 00000000 00000000 0000100e 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_line 00000416 00000000 00000000 000015a9 2**0 + CONTENTS, READONLY, DEBUGGING + 9 .debug_frame 00000104 00000000 00000000 000019c0 2**2 + CONTENTS, READONLY, DEBUGGING + 10 .debug_str 00000374 00000000 00000000 00001ac4 2**0 + CONTENTS, READONLY, DEBUGGING + 11 .debug_loc 00000281 00000000 00000000 00001e38 2**0 + CONTENTS, READONLY, DEBUGGING + 12 .debug_ranges 00000040 00000000 00000000 000020b9 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +00000000 <__vectors>: + 0: 12 c0 rjmp .+36 ; 0x26 <__ctors_end> + 2: 2a c0 rjmp .+84 ; 0x58 <__bad_interrupt> + 4: 29 c0 rjmp .+82 ; 0x58 <__bad_interrupt> + 6: 28 c0 rjmp .+80 ; 0x58 <__bad_interrupt> + 8: 27 c0 rjmp .+78 ; 0x58 <__bad_interrupt> + a: 26 c0 rjmp .+76 ; 0x58 <__bad_interrupt> + c: 25 c0 rjmp .+74 ; 0x58 <__bad_interrupt> + e: 24 c0 rjmp .+72 ; 0x58 <__bad_interrupt> + 10: 23 c0 rjmp .+70 ; 0x58 <__bad_interrupt> + 12: 22 c0 rjmp .+68 ; 0x58 <__bad_interrupt> + 14: 21 c0 rjmp .+66 ; 0x58 <__bad_interrupt> + 16: 20 c0 rjmp .+64 ; 0x58 <__bad_interrupt> + 18: 20 c0 rjmp .+64 ; 0x5a <__vector_12> + 1a: f6 c0 rjmp .+492 ; 0x208 <__vector_13> + 1c: 1d c0 rjmp .+58 ; 0x58 <__bad_interrupt> + 1e: 1c c0 rjmp .+56 ; 0x58 <__bad_interrupt> + 20: 1b c0 rjmp .+54 ; 0x58 <__bad_interrupt> + 22: 1a c0 rjmp .+52 ; 0x58 <__bad_interrupt> + 24: 19 c0 rjmp .+50 ; 0x58 <__bad_interrupt> + +00000026 <__ctors_end>: + 26: 11 24 eor r1, r1 + 28: 1f be out 0x3f, r1 ; 63 + 2a: cf ed ldi r28, 0xDF ; 223 + 2c: cd bf out 0x3d, r28 ; 61 + +0000002e <__do_copy_data>: + 2e: 10 e0 ldi r17, 0x00 ; 0 + 30: a0 e6 ldi r26, 0x60 ; 96 + 32: b0 e0 ldi r27, 0x00 ; 0 + 34: e4 e4 ldi r30, 0x44 ; 68 + 36: f7 e0 ldi r31, 0x07 ; 7 + 38: 02 c0 rjmp .+4 ; 0x3e <__SP_L__+0x1> + 3a: 05 90 lpm r0, Z+ + 3c: 0d 92 st X+, r0 + 3e: a8 37 cpi r26, 0x78 ; 120 + 40: b1 07 cpc r27, r17 + 42: d9 f7 brne .-10 ; 0x3a <__do_copy_data+0xc> + +00000044 <__do_clear_bss>: + 44: 20 e0 ldi r18, 0x00 ; 0 + 46: a8 e7 ldi r26, 0x78 ; 120 + 48: b0 e0 ldi r27, 0x00 ; 0 + 4a: 01 c0 rjmp .+2 ; 0x4e <.do_clear_bss_start> + +0000004c <.do_clear_bss_loop>: + 4c: 1d 92 st X+, r1 + +0000004e <.do_clear_bss_start>: + 4e: ab 37 cpi r26, 0x7B ; 123 + 50: b2 07 cpc r27, r18 + 52: e1 f7 brne .-8 ; 0x4c <.do_clear_bss_loop> + 54: 85 d0 rcall .+266 ; 0x160
+ 56: 74 c3 rjmp .+1768 ; 0x740 <_exit> + +00000058 <__bad_interrupt>: + 58: d3 cf rjmp .-90 ; 0x0 <__vectors> + +0000005a <__vector_12>: + display_num_msb(sec_ten, RIGHT, DP_OFF); + } +} + +ISR (TIMER1_COMPB_vect) +{ + 5a: 1f 92 push r1 + 5c: 0f 92 push r0 + 5e: 0f b6 in r0, 0x3f ; 63 + 60: 0f 92 push r0 + 62: 11 24 eor r1, r1 + 64: 8f 93 push r24 + 66: 9f 93 push r25 + PORTB ^= (1 << PINB4); + 68: 98 b3 in r25, 0x18 ; 24 + 6a: 80 e1 ldi r24, 0x10 ; 16 + 6c: 89 27 eor r24, r25 + 6e: 88 bb out 0x18, r24 ; 24 +} + 70: 9f 91 pop r25 + 72: 8f 91 pop r24 + 74: 0f 90 pop r0 + 76: 0f be out 0x3f, r0 ; 63 + 78: 0f 90 pop r0 + 7a: 1f 90 pop r1 + 7c: 18 95 reti + +0000007e : +} + +void shift_out_msb(uint8_t byte) +{ + uint8_t next_bit; + for (uint8_t i = 0; i < 8; i++) + 7e: 20 e0 ldi r18, 0x00 ; 0 + 80: 1c c0 rjmp .+56 ; 0xba <__DATA_REGION_LENGTH__+0x3a> + { + next_bit = ((byte >> (7 - i)) & 1); + 82: 67 e0 ldi r22, 0x07 ; 7 + 84: 70 e0 ldi r23, 0x00 ; 0 + 86: 62 1b sub r22, r18 + 88: 71 09 sbc r23, r1 + 8a: 48 2f mov r20, r24 + 8c: 50 e0 ldi r21, 0x00 ; 0 + 8e: 02 c0 rjmp .+4 ; 0x94 <__DATA_REGION_LENGTH__+0x14> + 90: 55 95 asr r21 + 92: 47 95 ror r20 + 94: 6a 95 dec r22 + 96: e2 f7 brpl .-8 ; 0x90 <__DATA_REGION_LENGTH__+0x10> + + if (next_bit) + 98: 40 ff sbrs r20, 0 + 9a: 04 c0 rjmp .+8 ; 0xa4 <__DATA_REGION_LENGTH__+0x24> + { + PORTD |= (1 << PIND2); + 9c: 92 b3 in r25, 0x12 ; 18 + 9e: 94 60 ori r25, 0x04 ; 4 + a0: 92 bb out 0x12, r25 ; 18 + a2: 03 c0 rjmp .+6 ; 0xaa <__DATA_REGION_LENGTH__+0x2a> + } + else + { + PORTD &= ~(1 << PIND2); + a4: 92 b3 in r25, 0x12 ; 18 + a6: 9b 7f andi r25, 0xFB ; 251 + a8: 92 bb out 0x12, r25 ; 18 + } + + // Toggle SCLK twice to shift out + PORTD ^= (1 << PIND4); + aa: 32 b3 in r19, 0x12 ; 18 + ac: 90 e1 ldi r25, 0x10 ; 16 + ae: 39 27 eor r19, r25 + b0: 32 bb out 0x12, r19 ; 18 + PORTD ^= (1 << PIND4); + b2: 32 b3 in r19, 0x12 ; 18 + b4: 93 27 eor r25, r19 + b6: 92 bb out 0x12, r25 ; 18 +} + +void shift_out_msb(uint8_t byte) +{ + uint8_t next_bit; + for (uint8_t i = 0; i < 8; i++) + b8: 2f 5f subi r18, 0xFF ; 255 + ba: 28 30 cpi r18, 0x08 ; 8 + bc: 10 f3 brcs .-60 ; 0x82 <__DATA_REGION_LENGTH__+0x2> + + // Toggle SCLK twice to shift out + PORTD ^= (1 << PIND4); + PORTD ^= (1 << PIND4); + } +} + be: 08 95 ret + +000000c0 : + +void display_num_msb(uint16_t number, digit_msb digit_number, decimal_point_msb dp) +{ + c0: 1f 93 push r17 + c2: cf 93 push r28 + c4: df 93 push r29 + c6: 14 2f mov r17, r20 + cli(); + c8: f8 94 cli + shift_out_msb((numbers_msb[number] >> 8) & digit_number); + ca: ec 01 movw r28, r24 + cc: cc 0f add r28, r28 + ce: dd 1f adc r29, r29 + d0: cf 59 subi r28, 0x9F ; 159 + d2: df 4f sbci r29, 0xFF ; 255 + d4: 89 81 ldd r24, Y+1 ; 0x01 + d6: 86 23 and r24, r22 + d8: d2 df rcall .-92 ; 0x7e + shift_out_msb((numbers_msb[number] & 0xff) & dp); + da: 88 81 ld r24, Y + dc: 81 23 and r24, r17 + de: cf df rcall .-98 ; 0x7e + + // Toggle RCLK twice to latch + PORTD ^= (1 << PIND3); + e0: 92 b3 in r25, 0x12 ; 18 + e2: 88 e0 ldi r24, 0x08 ; 8 + e4: 98 27 eor r25, r24 + e6: 92 bb out 0x12, r25 ; 18 + PORTD ^= (1 << PIND3); + e8: 92 b3 in r25, 0x12 ; 18 + ea: 89 27 eor r24, r25 + ec: 82 bb out 0x12, r24 ; 18 + sei(); + ee: 78 94 sei +} + f0: df 91 pop r29 + f2: cf 91 pop r28 + f4: 1f 91 pop r17 + f6: 08 95 ret + +000000f8 : +} + +void turn_off_beep() +{ + // Disable clock to timer + TCCR1B &= ~((1 << CS12) | (1 << CS11) | (1 << CS10)); + f8: 8e b5 in r24, 0x2e ; 46 + fa: 88 7f andi r24, 0xF8 ; 248 + fc: 8e bd out 0x2e, r24 ; 46 + + PORTB &= ~(0 << PINB4); + fe: 88 b3 in r24, 0x18 ; 24 + 100: 88 bb out 0x18, r24 ; 24 + 102: 08 95 ret + +00000104 : + sei(); +} + +void set_beep_freq(uint16_t freq_mHz) +{ + cli(); + 104: f8 94 cli + + // Constant sound when frequency gets too high + if (freq_mHz >= 100 * BEEP_LENGTH_MS) { + 106: 80 31 cpi r24, 0x10 ; 16 + 108: 27 e2 ldi r18, 0x27 ; 39 + 10a: 92 07 cpc r25, r18 + 10c: 10 f0 brcs .+4 ; 0x112 + turn_off_beep(); + 10e: f4 df rcall .-24 ; 0xf8 + // PORTB |= (1 << PINB4); + return; + 110: 08 95 ret + + // Frequency is determined by TOP[OCR1A] + // freq_mHz = (F_CPU * 1000) / ((prescalar + 1) * TOP[OCR1A] * 2) + // Lowest frequency without changing prescalar: 0.12Hz + + OCR1A = (F_CPU * 1000.0) / (65.0 * freq_mHz) / 2.0; + 112: bc 01 movw r22, r24 + 114: 80 e0 ldi r24, 0x00 ; 0 + 116: 90 e0 ldi r25, 0x00 ; 0 + 118: 1a d2 rcall .+1076 ; 0x54e <__floatunsisf> + 11a: 20 e0 ldi r18, 0x00 ; 0 + 11c: 30 e0 ldi r19, 0x00 ; 0 + 11e: 42 e8 ldi r20, 0x82 ; 130 + 120: 52 e4 ldi r21, 0x42 ; 66 + 122: a3 d2 rcall .+1350 ; 0x66a <__mulsf3> + 124: 9b 01 movw r18, r22 + 126: ac 01 movw r20, r24 + 128: 68 e2 ldi r22, 0x28 ; 40 + 12a: 7b e6 ldi r23, 0x6B ; 107 + 12c: 8e e6 ldi r24, 0x6E ; 110 + 12e: 9e e4 ldi r25, 0x4E ; 78 + 130: 7a d1 rcall .+756 ; 0x426 <__divsf3> + 132: 20 e0 ldi r18, 0x00 ; 0 + 134: 30 e0 ldi r19, 0x00 ; 0 + 136: 40 e0 ldi r20, 0x00 ; 0 + 138: 5f e3 ldi r21, 0x3F ; 63 + 13a: 97 d2 rcall .+1326 ; 0x66a <__mulsf3> + 13c: dc d1 rcall .+952 ; 0x4f6 <__fixunssfsi> + 13e: 7b bd out 0x2b, r23 ; 43 + 140: 6a bd out 0x2a, r22 ; 42 + + // ON-time is determined by COMP[OCR1B] + // on_time_ms = 2*(TOP[OCR1A] - COMP[OCR1B]) / (1000 * F_CPU / (prescalar)) + + OCR1B = OCR1A - ((BEEP_LENGTH_MS * (F_CPU / 1000.0)) / (2.0 * 65.0)); + 142: 6a b5 in r22, 0x2a ; 42 + 144: 7b b5 in r23, 0x2b ; 43 + 146: 80 e0 ldi r24, 0x00 ; 0 + 148: 90 e0 ldi r25, 0x00 ; 0 + 14a: 01 d2 rcall .+1026 ; 0x54e <__floatunsisf> + 14c: 25 ec ldi r18, 0xC5 ; 197 + 14e: 3e e4 ldi r19, 0x4E ; 78 + 150: 40 e4 ldi r20, 0x40 ; 64 + 152: 54 e4 ldi r21, 0x44 ; 68 + 154: 03 d1 rcall .+518 ; 0x35c <__subsf3> + 156: cf d1 rcall .+926 ; 0x4f6 <__fixunssfsi> + 158: 79 bd out 0x29, r23 ; 41 + 15a: 68 bd out 0x28, r22 ; 40 + + sei(); + 15c: 78 94 sei + 15e: 08 95 ret + +00000160
: +void set_beep_freq(uint16_t); +void turn_off_beep(); + +int main(void) +{ + cli(); + 160: f8 94 cli + + // Set up timer0 as clock, no pin output, interrupt, CTC + TCCR0A |= (1 << WGM01); + 162: 80 b7 in r24, 0x30 ; 48 + 164: 82 60 ori r24, 0x02 ; 2 + 166: 80 bf out 0x30, r24 ; 48 + TIMSK |= (1 << OCIE0A); + 168: 89 b7 in r24, 0x39 ; 57 + 16a: 81 60 ori r24, 0x01 ; 1 + 16c: 89 bf out 0x39, r24 ; 57 + OCR0A = F_CPU / 1024 / TIMER_INTERVAL_MS * 10; + 16e: 8a e5 ldi r24, 0x5A ; 90 + 170: 86 bf out 0x36, r24 ; 54 + + // Set up timer1 as beeper, no pin output, interrupt, OCR1A is top, OCR1B is compare, PWM phase correct + TCCR1A |= (1 << WGM11) | (1 << WGM10); + 172: 8f b5 in r24, 0x2f ; 47 + 174: 83 60 ori r24, 0x03 ; 3 + 176: 8f bd out 0x2f, r24 ; 47 + TCCR1B |= (1 << WGM13); + 178: 8e b5 in r24, 0x2e ; 46 + 17a: 80 61 ori r24, 0x10 ; 16 + 17c: 8e bd out 0x2e, r24 ; 46 + TIMSK |= (1 << OCIE1B); + 17e: 89 b7 in r24, 0x39 ; 57 + 180: 80 62 ori r24, 0x20 ; 32 + 182: 89 bf out 0x39, r24 ; 57 + + // Pin outputs + DDRD = (1 << PIND4) | (1 << PIND3) | (1 << PIND2); + 184: 8c e1 ldi r24, 0x1C ; 28 + 186: 81 bb out 0x11, r24 ; 17 + DDRB = (1 << PINB4); + 188: 80 e1 ldi r24, 0x10 ; 16 + 18a: 87 bb out 0x17, r24 ; 23 + + + + /* Mainloops */ + PORTD = 0x00; + 18c: 12 ba out 0x12, r1 ; 18 + sei(); + 18e: 78 94 sei + while (!(PINB & 1)) + 190: 12 c0 rjmp .+36 ; 0x1b6 + { + // Idle until button 1 is pressed, continously display starttime + display_num_msb(sec, MIDDLE, DP_ON); + 192: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 196: 47 ef ldi r20, 0xF7 ; 247 + 198: 6f eb ldi r22, 0xBF ; 191 + 19a: 90 e0 ldi r25, 0x00 ; 0 + 19c: 91 df rcall .-222 ; 0xc0 + display_num_msb(ten_sec, LEFT, DP_OFF); + 19e: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 1a2: 4f ef ldi r20, 0xFF ; 255 + 1a4: 6f e7 ldi r22, 0x7F ; 127 + 1a6: 90 e0 ldi r25, 0x00 ; 0 + 1a8: 8b df rcall .-234 ; 0xc0 + display_num_msb(sec_ten, RIGHT, DP_OFF); + 1aa: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 1ae: 4f ef ldi r20, 0xFF ; 255 + 1b0: 6f ed ldi r22, 0xDF ; 223 + 1b2: 90 e0 ldi r25, 0x00 ; 0 + 1b4: 85 df rcall .-246 ; 0xc0 + + + /* Mainloops */ + PORTD = 0x00; + sei(); + while (!(PINB & 1)) + 1b6: b0 9b sbis 0x16, 0 ; 22 + 1b8: ec cf rjmp .-40 ; 0x192 + display_num_msb(ten_sec, LEFT, DP_OFF); + display_num_msb(sec_ten, RIGHT, DP_OFF); + } + + // Start timer0 with prescaler of 1024 + TCCR0B |= (1 << CS02) | (0 << CS01) | (1 << CS00); + 1ba: 83 b7 in r24, 0x33 ; 51 + 1bc: 85 60 ori r24, 0x05 ; 5 + 1be: 83 bf out 0x33, r24 ; 51 + + // Start beeping once every 5 seconds + set_beep_freq(200); + 1c0: 88 ec ldi r24, 0xC8 ; 200 + 1c2: 90 e0 ldi r25, 0x00 ; 0 + 1c4: 9f df rcall .-194 ; 0x104 + + // Start timer1 with prescaler of 64 + TCCR1B |= (0 << CS12) | (1 << CS11) | (1 << CS10); + 1c6: 8e b5 in r24, 0x2e ; 46 + 1c8: 83 60 ori r24, 0x03 ; 3 + 1ca: 8e bd out 0x2e, r24 ; 46 + + while (1) + { + // Turn of dp if detonated + if (boom) + 1cc: 80 91 78 00 lds r24, 0x0078 ; 0x800078 <__data_end> + 1d0: 88 23 and r24, r24 + 1d2: 39 f0 breq .+14 ; 0x1e2 + { + display_num_msb(sec, MIDDLE, DP_OFF); + 1d4: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 1d8: 4f ef ldi r20, 0xFF ; 255 + 1da: 6f eb ldi r22, 0xBF ; 191 + 1dc: 90 e0 ldi r25, 0x00 ; 0 + 1de: 70 df rcall .-288 ; 0xc0 + 1e0: 06 c0 rjmp .+12 ; 0x1ee + } + else + { + display_num_msb(sec, MIDDLE, DP_ON); + 1e2: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 1e6: 47 ef ldi r20, 0xF7 ; 247 + 1e8: 6f eb ldi r22, 0xBF ; 191 + 1ea: 90 e0 ldi r25, 0x00 ; 0 + 1ec: 69 df rcall .-302 ; 0xc0 + } + + display_num_msb(ten_sec, LEFT, DP_OFF); + 1ee: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 1f2: 4f ef ldi r20, 0xFF ; 255 + 1f4: 6f e7 ldi r22, 0x7F ; 127 + 1f6: 90 e0 ldi r25, 0x00 ; 0 + 1f8: 63 df rcall .-314 ; 0xc0 + display_num_msb(sec_ten, RIGHT, DP_OFF); + 1fa: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 1fe: 4f ef ldi r20, 0xFF ; 255 + 200: 6f ed ldi r22, 0xDF ; 223 + 202: 90 e0 ldi r25, 0x00 ; 0 + 204: 5d df rcall .-326 ; 0xc0 + } + 206: e2 cf rjmp .-60 ; 0x1cc + +00000208 <__vector_13>: +ISR (TIMER1_COMPB_vect) +{ + PORTB ^= (1 << PINB4); +} + +ISR (TIMER0_COMPA_vect) { + 208: 1f 92 push r1 + 20a: 0f 92 push r0 + 20c: 0f b6 in r0, 0x3f ; 63 + 20e: 0f 92 push r0 + 210: 11 24 eor r1, r1 + 212: cf 92 push r12 + 214: df 92 push r13 + 216: ef 92 push r14 + 218: ff 92 push r15 + 21a: 2f 93 push r18 + 21c: 3f 93 push r19 + 21e: 4f 93 push r20 + 220: 5f 93 push r21 + 222: 6f 93 push r22 + 224: 7f 93 push r23 + 226: 8f 93 push r24 + 228: 9f 93 push r25 + 22a: af 93 push r26 + 22c: bf 93 push r27 + 22e: ef 93 push r30 + 230: ff 93 push r31 + + // Flash on and off after detonation + if (boom & 1) + 232: 80 91 78 00 lds r24, 0x0078 ; 0x800078 <__data_end> + 236: 80 ff sbrs r24, 0 + 238: 0b c0 rjmp .+22 ; 0x250 <__vector_13+0x48> + { + // Flash off + //PORTB = (1<< PINB4); + ten_sec = DISPLAY_OFF; + 23a: 8a e0 ldi r24, 0x0A ; 10 + 23c: 80 93 60 00 sts 0x0060, r24 ; 0x800060 <__DATA_REGION_ORIGIN__> + sec = DISPLAY_OFF; + 240: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a + sec_ten = DISPLAY_OFF; + 244: 80 93 79 00 sts 0x0079, r24 ; 0x800079 + + boom = 2; + 248: 82 e0 ldi r24, 0x02 ; 2 + 24a: 80 93 78 00 sts 0x0078, r24 ; 0x800078 <__data_end> + 24e: 71 c0 rjmp .+226 ; 0x332 <__vector_13+0x12a> + } + else if (boom & 2) + 250: 80 91 78 00 lds r24, 0x0078 ; 0x800078 <__data_end> + 254: 81 ff sbrs r24, 1 + 256: 0b c0 rjmp .+22 ; 0x26e <__vector_13+0x66> + { + PORTB = (0<< PINB4); + 258: 18 ba out 0x18, r1 ; 24 + // Flash 0 + ten_sec = 0; + 25a: 10 92 60 00 sts 0x0060, r1 ; 0x800060 <__DATA_REGION_ORIGIN__> + sec = 0; + 25e: 10 92 7a 00 sts 0x007A, r1 ; 0x80007a + sec_ten = 0; + 262: 10 92 79 00 sts 0x0079, r1 ; 0x800079 + + boom = 1; + 266: 81 e0 ldi r24, 0x01 ; 1 + 268: 80 93 78 00 sts 0x0078, r24 ; 0x800078 <__data_end> + 26c: 62 c0 rjmp .+196 ; 0x332 <__vector_13+0x12a> + + // Countdown + else + { + // 0.1 to prevent divide by 0 + set_beep_freq(200.0 * 60.0 / ((10.0 * ten_sec) + sec + 0.1)); + 26e: 60 91 60 00 lds r22, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 272: 70 e0 ldi r23, 0x00 ; 0 + 274: 80 e0 ldi r24, 0x00 ; 0 + 276: 90 e0 ldi r25, 0x00 ; 0 + 278: 6c d1 rcall .+728 ; 0x552 <__floatsisf> + 27a: 20 e0 ldi r18, 0x00 ; 0 + 27c: 30 e0 ldi r19, 0x00 ; 0 + 27e: 40 e2 ldi r20, 0x20 ; 32 + 280: 51 e4 ldi r21, 0x41 ; 65 + 282: f3 d1 rcall .+998 ; 0x66a <__mulsf3> + 284: 6b 01 movw r12, r22 + 286: 7c 01 movw r14, r24 + 288: 60 91 7a 00 lds r22, 0x007A ; 0x80007a + 28c: 70 e0 ldi r23, 0x00 ; 0 + 28e: 80 e0 ldi r24, 0x00 ; 0 + 290: 90 e0 ldi r25, 0x00 ; 0 + 292: 5f d1 rcall .+702 ; 0x552 <__floatsisf> + 294: a7 01 movw r20, r14 + 296: 96 01 movw r18, r12 + 298: 62 d0 rcall .+196 ; 0x35e <__addsf3> + 29a: 2d ec ldi r18, 0xCD ; 205 + 29c: 3c ec ldi r19, 0xCC ; 204 + 29e: 4c ec ldi r20, 0xCC ; 204 + 2a0: 5d e3 ldi r21, 0x3D ; 61 + 2a2: 5d d0 rcall .+186 ; 0x35e <__addsf3> + 2a4: 9b 01 movw r18, r22 + 2a6: ac 01 movw r20, r24 + 2a8: 60 e0 ldi r22, 0x00 ; 0 + 2aa: 70 e8 ldi r23, 0x80 ; 128 + 2ac: 8b e3 ldi r24, 0x3B ; 59 + 2ae: 96 e4 ldi r25, 0x46 ; 70 + 2b0: ba d0 rcall .+372 ; 0x426 <__divsf3> + 2b2: 21 d1 rcall .+578 ; 0x4f6 <__fixunssfsi> + 2b4: cb 01 movw r24, r22 + 2b6: 26 df rcall .-436 ; 0x104 + + if (ten_sec == 0 && sec == 0 && sec_ten) + 2b8: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 2bc: 81 11 cpse r24, r1 + 2be: 14 c0 rjmp .+40 ; 0x2e8 <__vector_13+0xe0> + 2c0: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 2c4: 81 11 cpse r24, r1 + 2c6: 10 c0 rjmp .+32 ; 0x2e8 <__vector_13+0xe0> + 2c8: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 2cc: 88 23 and r24, r24 + 2ce: 61 f0 breq .+24 ; 0x2e8 <__vector_13+0xe0> + { + ten_sec = 0; + 2d0: 10 92 60 00 sts 0x0060, r1 ; 0x800060 <__DATA_REGION_ORIGIN__> + sec = 0; + 2d4: 10 92 7a 00 sts 0x007A, r1 ; 0x80007a + sec_ten = 0; + 2d8: 10 92 79 00 sts 0x0079, r1 ; 0x800079 + + // Detonate, slow down timer for flashing + boom = 1; + 2dc: 81 e0 ldi r24, 0x01 ; 1 + 2de: 80 93 78 00 sts 0x0078, r24 ; 0x800078 <__data_end> + OCR0A = 98 * 2; + 2e2: 84 ec ldi r24, 0xC4 ; 196 + 2e4: 86 bf out 0x36, r24 ; 54 + 2e6: 25 c0 rjmp .+74 ; 0x332 <__vector_13+0x12a> + } + else + { + if (sec == 0 && sec_ten == 0) + 2e8: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 2ec: 81 11 cpse r24, r1 + 2ee: 0f c0 rjmp .+30 ; 0x30e <__vector_13+0x106> + 2f0: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 2f4: 81 11 cpse r24, r1 + 2f6: 0b c0 rjmp .+22 ; 0x30e <__vector_13+0x106> + { + sec = 9; + 2f8: 89 e0 ldi r24, 0x09 ; 9 + 2fa: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a + sec_ten = 9; + 2fe: 80 93 79 00 sts 0x0079, r24 ; 0x800079 + ten_sec--; + 302: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 306: 81 50 subi r24, 0x01 ; 1 + 308: 80 93 60 00 sts 0x0060, r24 ; 0x800060 <__DATA_REGION_ORIGIN__> + 30c: 12 c0 rjmp .+36 ; 0x332 <__vector_13+0x12a> + } + else + { + if (sec_ten == 0) + 30e: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 312: 81 11 cpse r24, r1 + 314: 09 c0 rjmp .+18 ; 0x328 <__vector_13+0x120> + { + sec_ten = 9; + 316: 89 e0 ldi r24, 0x09 ; 9 + 318: 80 93 79 00 sts 0x0079, r24 ; 0x800079 + sec--; + 31c: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 320: 81 50 subi r24, 0x01 ; 1 + 322: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a + 326: 05 c0 rjmp .+10 ; 0x332 <__vector_13+0x12a> + } + else + { + sec_ten--; + 328: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 32c: 81 50 subi r24, 0x01 ; 1 + 32e: 80 93 79 00 sts 0x0079, r24 ; 0x800079 + } + } + } + } +} + 332: ff 91 pop r31 + 334: ef 91 pop r30 + 336: bf 91 pop r27 + 338: af 91 pop r26 + 33a: 9f 91 pop r25 + 33c: 8f 91 pop r24 + 33e: 7f 91 pop r23 + 340: 6f 91 pop r22 + 342: 5f 91 pop r21 + 344: 4f 91 pop r20 + 346: 3f 91 pop r19 + 348: 2f 91 pop r18 + 34a: ff 90 pop r15 + 34c: ef 90 pop r14 + 34e: df 90 pop r13 + 350: cf 90 pop r12 + 352: 0f 90 pop r0 + 354: 0f be out 0x3f, r0 ; 63 + 356: 0f 90 pop r0 + 358: 1f 90 pop r1 + 35a: 18 95 reti + +0000035c <__subsf3>: + 35c: 50 58 subi r21, 0x80 ; 128 + +0000035e <__addsf3>: + 35e: bb 27 eor r27, r27 + 360: aa 27 eor r26, r26 + 362: 0e d0 rcall .+28 ; 0x380 <__addsf3x> + 364: 48 c1 rjmp .+656 ; 0x5f6 <__fp_round> + 366: 39 d1 rcall .+626 ; 0x5da <__fp_pscA> + 368: 30 f0 brcs .+12 ; 0x376 <__addsf3+0x18> + 36a: 3e d1 rcall .+636 ; 0x5e8 <__fp_pscB> + 36c: 20 f0 brcs .+8 ; 0x376 <__addsf3+0x18> + 36e: 31 f4 brne .+12 ; 0x37c <__addsf3+0x1e> + 370: 9f 3f cpi r25, 0xFF ; 255 + 372: 11 f4 brne .+4 ; 0x378 <__addsf3+0x1a> + 374: 1e f4 brtc .+6 ; 0x37c <__addsf3+0x1e> + 376: 2e c1 rjmp .+604 ; 0x5d4 <__fp_nan> + 378: 0e f4 brtc .+2 ; 0x37c <__addsf3+0x1e> + 37a: e0 95 com r30 + 37c: e7 fb bst r30, 7 + 37e: 24 c1 rjmp .+584 ; 0x5c8 <__fp_inf> + +00000380 <__addsf3x>: + 380: e9 2f mov r30, r25 + 382: 4a d1 rcall .+660 ; 0x618 <__fp_split3> + 384: 80 f3 brcs .-32 ; 0x366 <__addsf3+0x8> + 386: ba 17 cp r27, r26 + 388: 62 07 cpc r22, r18 + 38a: 73 07 cpc r23, r19 + 38c: 84 07 cpc r24, r20 + 38e: 95 07 cpc r25, r21 + 390: 18 f0 brcs .+6 ; 0x398 <__addsf3x+0x18> + 392: 71 f4 brne .+28 ; 0x3b0 <__addsf3x+0x30> + 394: 9e f5 brtc .+102 ; 0x3fc <__addsf3x+0x7c> + 396: 62 c1 rjmp .+708 ; 0x65c <__fp_zero> + 398: 0e f4 brtc .+2 ; 0x39c <__addsf3x+0x1c> + 39a: e0 95 com r30 + 39c: 0b 2e mov r0, r27 + 39e: ba 2f mov r27, r26 + 3a0: a0 2d mov r26, r0 + 3a2: 0b 01 movw r0, r22 + 3a4: b9 01 movw r22, r18 + 3a6: 90 01 movw r18, r0 + 3a8: 0c 01 movw r0, r24 + 3aa: ca 01 movw r24, r20 + 3ac: a0 01 movw r20, r0 + 3ae: 11 24 eor r1, r1 + 3b0: ff 27 eor r31, r31 + 3b2: 59 1b sub r21, r25 + 3b4: 99 f0 breq .+38 ; 0x3dc <__addsf3x+0x5c> + 3b6: 59 3f cpi r21, 0xF9 ; 249 + 3b8: 50 f4 brcc .+20 ; 0x3ce <__addsf3x+0x4e> + 3ba: 50 3e cpi r21, 0xE0 ; 224 + 3bc: 68 f1 brcs .+90 ; 0x418 <__LOCK_REGION_LENGTH__+0x18> + 3be: 1a 16 cp r1, r26 + 3c0: f0 40 sbci r31, 0x00 ; 0 + 3c2: a2 2f mov r26, r18 + 3c4: 23 2f mov r18, r19 + 3c6: 34 2f mov r19, r20 + 3c8: 44 27 eor r20, r20 + 3ca: 58 5f subi r21, 0xF8 ; 248 + 3cc: f3 cf rjmp .-26 ; 0x3b4 <__addsf3x+0x34> + 3ce: 46 95 lsr r20 + 3d0: 37 95 ror r19 + 3d2: 27 95 ror r18 + 3d4: a7 95 ror r26 + 3d6: f0 40 sbci r31, 0x00 ; 0 + 3d8: 53 95 inc r21 + 3da: c9 f7 brne .-14 ; 0x3ce <__addsf3x+0x4e> + 3dc: 7e f4 brtc .+30 ; 0x3fc <__addsf3x+0x7c> + 3de: 1f 16 cp r1, r31 + 3e0: ba 0b sbc r27, r26 + 3e2: 62 0b sbc r22, r18 + 3e4: 73 0b sbc r23, r19 + 3e6: 84 0b sbc r24, r20 + 3e8: ba f0 brmi .+46 ; 0x418 <__LOCK_REGION_LENGTH__+0x18> + 3ea: 91 50 subi r25, 0x01 ; 1 + 3ec: a1 f0 breq .+40 ; 0x416 <__LOCK_REGION_LENGTH__+0x16> + 3ee: ff 0f add r31, r31 + 3f0: bb 1f adc r27, r27 + 3f2: 66 1f adc r22, r22 + 3f4: 77 1f adc r23, r23 + 3f6: 88 1f adc r24, r24 + 3f8: c2 f7 brpl .-16 ; 0x3ea <__addsf3x+0x6a> + 3fa: 0e c0 rjmp .+28 ; 0x418 <__LOCK_REGION_LENGTH__+0x18> + 3fc: ba 0f add r27, r26 + 3fe: 62 1f adc r22, r18 + 400: 73 1f adc r23, r19 + 402: 84 1f adc r24, r20 + 404: 48 f4 brcc .+18 ; 0x418 <__LOCK_REGION_LENGTH__+0x18> + 406: 87 95 ror r24 + 408: 77 95 ror r23 + 40a: 67 95 ror r22 + 40c: b7 95 ror r27 + 40e: f7 95 ror r31 + 410: 9e 3f cpi r25, 0xFE ; 254 + 412: 08 f0 brcs .+2 ; 0x416 <__LOCK_REGION_LENGTH__+0x16> + 414: b3 cf rjmp .-154 ; 0x37c <__addsf3+0x1e> + 416: 93 95 inc r25 + 418: 88 0f add r24, r24 + 41a: 08 f0 brcs .+2 ; 0x41e <__LOCK_REGION_LENGTH__+0x1e> + 41c: 99 27 eor r25, r25 + 41e: ee 0f add r30, r30 + 420: 97 95 ror r25 + 422: 87 95 ror r24 + 424: 08 95 ret + +00000426 <__divsf3>: + 426: 0c d0 rcall .+24 ; 0x440 <__divsf3x> + 428: e6 c0 rjmp .+460 ; 0x5f6 <__fp_round> + 42a: de d0 rcall .+444 ; 0x5e8 <__fp_pscB> + 42c: 40 f0 brcs .+16 ; 0x43e <__divsf3+0x18> + 42e: d5 d0 rcall .+426 ; 0x5da <__fp_pscA> + 430: 30 f0 brcs .+12 ; 0x43e <__divsf3+0x18> + 432: 21 f4 brne .+8 ; 0x43c <__divsf3+0x16> + 434: 5f 3f cpi r21, 0xFF ; 255 + 436: 19 f0 breq .+6 ; 0x43e <__divsf3+0x18> + 438: c7 c0 rjmp .+398 ; 0x5c8 <__fp_inf> + 43a: 51 11 cpse r21, r1 + 43c: 10 c1 rjmp .+544 ; 0x65e <__fp_szero> + 43e: ca c0 rjmp .+404 ; 0x5d4 <__fp_nan> + +00000440 <__divsf3x>: + 440: eb d0 rcall .+470 ; 0x618 <__fp_split3> + 442: 98 f3 brcs .-26 ; 0x42a <__divsf3+0x4> + +00000444 <__divsf3_pse>: + 444: 99 23 and r25, r25 + 446: c9 f3 breq .-14 ; 0x43a <__divsf3+0x14> + 448: 55 23 and r21, r21 + 44a: b1 f3 breq .-20 ; 0x438 <__divsf3+0x12> + 44c: 95 1b sub r25, r21 + 44e: 55 0b sbc r21, r21 + 450: bb 27 eor r27, r27 + 452: aa 27 eor r26, r26 + 454: 62 17 cp r22, r18 + 456: 73 07 cpc r23, r19 + 458: 84 07 cpc r24, r20 + 45a: 38 f0 brcs .+14 ; 0x46a <__divsf3_pse+0x26> + 45c: 9f 5f subi r25, 0xFF ; 255 + 45e: 5f 4f sbci r21, 0xFF ; 255 + 460: 22 0f add r18, r18 + 462: 33 1f adc r19, r19 + 464: 44 1f adc r20, r20 + 466: aa 1f adc r26, r26 + 468: a9 f3 breq .-22 ; 0x454 <__divsf3_pse+0x10> + 46a: 33 d0 rcall .+102 ; 0x4d2 <__divsf3_pse+0x8e> + 46c: 0e 2e mov r0, r30 + 46e: 3a f0 brmi .+14 ; 0x47e <__divsf3_pse+0x3a> + 470: e0 e8 ldi r30, 0x80 ; 128 + 472: 30 d0 rcall .+96 ; 0x4d4 <__divsf3_pse+0x90> + 474: 91 50 subi r25, 0x01 ; 1 + 476: 50 40 sbci r21, 0x00 ; 0 + 478: e6 95 lsr r30 + 47a: 00 1c adc r0, r0 + 47c: ca f7 brpl .-14 ; 0x470 <__divsf3_pse+0x2c> + 47e: 29 d0 rcall .+82 ; 0x4d2 <__divsf3_pse+0x8e> + 480: fe 2f mov r31, r30 + 482: 27 d0 rcall .+78 ; 0x4d2 <__divsf3_pse+0x8e> + 484: 66 0f add r22, r22 + 486: 77 1f adc r23, r23 + 488: 88 1f adc r24, r24 + 48a: bb 1f adc r27, r27 + 48c: 26 17 cp r18, r22 + 48e: 37 07 cpc r19, r23 + 490: 48 07 cpc r20, r24 + 492: ab 07 cpc r26, r27 + 494: b0 e8 ldi r27, 0x80 ; 128 + 496: 09 f0 breq .+2 ; 0x49a <__divsf3_pse+0x56> + 498: bb 0b sbc r27, r27 + 49a: 80 2d mov r24, r0 + 49c: bf 01 movw r22, r30 + 49e: ff 27 eor r31, r31 + 4a0: 93 58 subi r25, 0x83 ; 131 + 4a2: 5f 4f sbci r21, 0xFF ; 255 + 4a4: 2a f0 brmi .+10 ; 0x4b0 <__divsf3_pse+0x6c> + 4a6: 9e 3f cpi r25, 0xFE ; 254 + 4a8: 51 05 cpc r21, r1 + 4aa: 68 f0 brcs .+26 ; 0x4c6 <__divsf3_pse+0x82> + 4ac: 8d c0 rjmp .+282 ; 0x5c8 <__fp_inf> + 4ae: d7 c0 rjmp .+430 ; 0x65e <__fp_szero> + 4b0: 5f 3f cpi r21, 0xFF ; 255 + 4b2: ec f3 brlt .-6 ; 0x4ae <__divsf3_pse+0x6a> + 4b4: 98 3e cpi r25, 0xE8 ; 232 + 4b6: dc f3 brlt .-10 ; 0x4ae <__divsf3_pse+0x6a> + 4b8: 86 95 lsr r24 + 4ba: 77 95 ror r23 + 4bc: 67 95 ror r22 + 4be: b7 95 ror r27 + 4c0: f7 95 ror r31 + 4c2: 9f 5f subi r25, 0xFF ; 255 + 4c4: c9 f7 brne .-14 ; 0x4b8 <__divsf3_pse+0x74> + 4c6: 88 0f add r24, r24 + 4c8: 91 1d adc r25, r1 + 4ca: 96 95 lsr r25 + 4cc: 87 95 ror r24 + 4ce: 97 f9 bld r25, 7 + 4d0: 08 95 ret + 4d2: e1 e0 ldi r30, 0x01 ; 1 + 4d4: 66 0f add r22, r22 + 4d6: 77 1f adc r23, r23 + 4d8: 88 1f adc r24, r24 + 4da: bb 1f adc r27, r27 + 4dc: 62 17 cp r22, r18 + 4de: 73 07 cpc r23, r19 + 4e0: 84 07 cpc r24, r20 + 4e2: ba 07 cpc r27, r26 + 4e4: 20 f0 brcs .+8 ; 0x4ee <__divsf3_pse+0xaa> + 4e6: 62 1b sub r22, r18 + 4e8: 73 0b sbc r23, r19 + 4ea: 84 0b sbc r24, r20 + 4ec: ba 0b sbc r27, r26 + 4ee: ee 1f adc r30, r30 + 4f0: 88 f7 brcc .-30 ; 0x4d4 <__divsf3_pse+0x90> + 4f2: e0 95 com r30 + 4f4: 08 95 ret + +000004f6 <__fixunssfsi>: + 4f6: 98 d0 rcall .+304 ; 0x628 <__fp_splitA> + 4f8: 88 f0 brcs .+34 ; 0x51c <__fixunssfsi+0x26> + 4fa: 9f 57 subi r25, 0x7F ; 127 + 4fc: 90 f0 brcs .+36 ; 0x522 <__fixunssfsi+0x2c> + 4fe: b9 2f mov r27, r25 + 500: 99 27 eor r25, r25 + 502: b7 51 subi r27, 0x17 ; 23 + 504: a0 f0 brcs .+40 ; 0x52e <__fixunssfsi+0x38> + 506: d1 f0 breq .+52 ; 0x53c <__fixunssfsi+0x46> + 508: 66 0f add r22, r22 + 50a: 77 1f adc r23, r23 + 50c: 88 1f adc r24, r24 + 50e: 99 1f adc r25, r25 + 510: 1a f0 brmi .+6 ; 0x518 <__fixunssfsi+0x22> + 512: ba 95 dec r27 + 514: c9 f7 brne .-14 ; 0x508 <__fixunssfsi+0x12> + 516: 12 c0 rjmp .+36 ; 0x53c <__fixunssfsi+0x46> + 518: b1 30 cpi r27, 0x01 ; 1 + 51a: 81 f0 breq .+32 ; 0x53c <__fixunssfsi+0x46> + 51c: 9f d0 rcall .+318 ; 0x65c <__fp_zero> + 51e: b1 e0 ldi r27, 0x01 ; 1 + 520: 08 95 ret + 522: 9c c0 rjmp .+312 ; 0x65c <__fp_zero> + 524: 67 2f mov r22, r23 + 526: 78 2f mov r23, r24 + 528: 88 27 eor r24, r24 + 52a: b8 5f subi r27, 0xF8 ; 248 + 52c: 39 f0 breq .+14 ; 0x53c <__fixunssfsi+0x46> + 52e: b9 3f cpi r27, 0xF9 ; 249 + 530: cc f3 brlt .-14 ; 0x524 <__fixunssfsi+0x2e> + 532: 86 95 lsr r24 + 534: 77 95 ror r23 + 536: 67 95 ror r22 + 538: b3 95 inc r27 + 53a: d9 f7 brne .-10 ; 0x532 <__fixunssfsi+0x3c> + 53c: 3e f4 brtc .+14 ; 0x54c <__fixunssfsi+0x56> + 53e: 90 95 com r25 + 540: 80 95 com r24 + 542: 70 95 com r23 + 544: 61 95 neg r22 + 546: 7f 4f sbci r23, 0xFF ; 255 + 548: 8f 4f sbci r24, 0xFF ; 255 + 54a: 9f 4f sbci r25, 0xFF ; 255 + 54c: 08 95 ret + +0000054e <__floatunsisf>: + 54e: e8 94 clt + 550: 09 c0 rjmp .+18 ; 0x564 <__floatsisf+0x12> + +00000552 <__floatsisf>: + 552: 97 fb bst r25, 7 + 554: 3e f4 brtc .+14 ; 0x564 <__floatsisf+0x12> + 556: 90 95 com r25 + 558: 80 95 com r24 + 55a: 70 95 com r23 + 55c: 61 95 neg r22 + 55e: 7f 4f sbci r23, 0xFF ; 255 + 560: 8f 4f sbci r24, 0xFF ; 255 + 562: 9f 4f sbci r25, 0xFF ; 255 + 564: 99 23 and r25, r25 + 566: a9 f0 breq .+42 ; 0x592 <__floatsisf+0x40> + 568: f9 2f mov r31, r25 + 56a: 96 e9 ldi r25, 0x96 ; 150 + 56c: bb 27 eor r27, r27 + 56e: 93 95 inc r25 + 570: f6 95 lsr r31 + 572: 87 95 ror r24 + 574: 77 95 ror r23 + 576: 67 95 ror r22 + 578: b7 95 ror r27 + 57a: f1 11 cpse r31, r1 + 57c: f8 cf rjmp .-16 ; 0x56e <__floatsisf+0x1c> + 57e: fa f4 brpl .+62 ; 0x5be <__floatsisf+0x6c> + 580: bb 0f add r27, r27 + 582: 11 f4 brne .+4 ; 0x588 <__floatsisf+0x36> + 584: 60 ff sbrs r22, 0 + 586: 1b c0 rjmp .+54 ; 0x5be <__floatsisf+0x6c> + 588: 6f 5f subi r22, 0xFF ; 255 + 58a: 7f 4f sbci r23, 0xFF ; 255 + 58c: 8f 4f sbci r24, 0xFF ; 255 + 58e: 9f 4f sbci r25, 0xFF ; 255 + 590: 16 c0 rjmp .+44 ; 0x5be <__floatsisf+0x6c> + 592: 88 23 and r24, r24 + 594: 11 f0 breq .+4 ; 0x59a <__floatsisf+0x48> + 596: 96 e9 ldi r25, 0x96 ; 150 + 598: 11 c0 rjmp .+34 ; 0x5bc <__floatsisf+0x6a> + 59a: 77 23 and r23, r23 + 59c: 21 f0 breq .+8 ; 0x5a6 <__floatsisf+0x54> + 59e: 9e e8 ldi r25, 0x8E ; 142 + 5a0: 87 2f mov r24, r23 + 5a2: 76 2f mov r23, r22 + 5a4: 05 c0 rjmp .+10 ; 0x5b0 <__floatsisf+0x5e> + 5a6: 66 23 and r22, r22 + 5a8: 71 f0 breq .+28 ; 0x5c6 <__floatsisf+0x74> + 5aa: 96 e8 ldi r25, 0x86 ; 134 + 5ac: 86 2f mov r24, r22 + 5ae: 70 e0 ldi r23, 0x00 ; 0 + 5b0: 60 e0 ldi r22, 0x00 ; 0 + 5b2: 2a f0 brmi .+10 ; 0x5be <__floatsisf+0x6c> + 5b4: 9a 95 dec r25 + 5b6: 66 0f add r22, r22 + 5b8: 77 1f adc r23, r23 + 5ba: 88 1f adc r24, r24 + 5bc: da f7 brpl .-10 ; 0x5b4 <__floatsisf+0x62> + 5be: 88 0f add r24, r24 + 5c0: 96 95 lsr r25 + 5c2: 87 95 ror r24 + 5c4: 97 f9 bld r25, 7 + 5c6: 08 95 ret + +000005c8 <__fp_inf>: + 5c8: 97 f9 bld r25, 7 + 5ca: 9f 67 ori r25, 0x7F ; 127 + 5cc: 80 e8 ldi r24, 0x80 ; 128 + 5ce: 70 e0 ldi r23, 0x00 ; 0 + 5d0: 60 e0 ldi r22, 0x00 ; 0 + 5d2: 08 95 ret + +000005d4 <__fp_nan>: + 5d4: 9f ef ldi r25, 0xFF ; 255 + 5d6: 80 ec ldi r24, 0xC0 ; 192 + 5d8: 08 95 ret + +000005da <__fp_pscA>: + 5da: 00 24 eor r0, r0 + 5dc: 0a 94 dec r0 + 5de: 16 16 cp r1, r22 + 5e0: 17 06 cpc r1, r23 + 5e2: 18 06 cpc r1, r24 + 5e4: 09 06 cpc r0, r25 + 5e6: 08 95 ret + +000005e8 <__fp_pscB>: + 5e8: 00 24 eor r0, r0 + 5ea: 0a 94 dec r0 + 5ec: 12 16 cp r1, r18 + 5ee: 13 06 cpc r1, r19 + 5f0: 14 06 cpc r1, r20 + 5f2: 05 06 cpc r0, r21 + 5f4: 08 95 ret + +000005f6 <__fp_round>: + 5f6: 09 2e mov r0, r25 + 5f8: 03 94 inc r0 + 5fa: 00 0c add r0, r0 + 5fc: 11 f4 brne .+4 ; 0x602 <__fp_round+0xc> + 5fe: 88 23 and r24, r24 + 600: 52 f0 brmi .+20 ; 0x616 <__fp_round+0x20> + 602: bb 0f add r27, r27 + 604: 40 f4 brcc .+16 ; 0x616 <__fp_round+0x20> + 606: bf 2b or r27, r31 + 608: 11 f4 brne .+4 ; 0x60e <__fp_round+0x18> + 60a: 60 ff sbrs r22, 0 + 60c: 04 c0 rjmp .+8 ; 0x616 <__fp_round+0x20> + 60e: 6f 5f subi r22, 0xFF ; 255 + 610: 7f 4f sbci r23, 0xFF ; 255 + 612: 8f 4f sbci r24, 0xFF ; 255 + 614: 9f 4f sbci r25, 0xFF ; 255 + 616: 08 95 ret + +00000618 <__fp_split3>: + 618: 57 fd sbrc r21, 7 + 61a: 90 58 subi r25, 0x80 ; 128 + 61c: 44 0f add r20, r20 + 61e: 55 1f adc r21, r21 + 620: 59 f0 breq .+22 ; 0x638 <__fp_splitA+0x10> + 622: 5f 3f cpi r21, 0xFF ; 255 + 624: 71 f0 breq .+28 ; 0x642 <__fp_splitA+0x1a> + 626: 47 95 ror r20 + +00000628 <__fp_splitA>: + 628: 88 0f add r24, r24 + 62a: 97 fb bst r25, 7 + 62c: 99 1f adc r25, r25 + 62e: 61 f0 breq .+24 ; 0x648 <__fp_splitA+0x20> + 630: 9f 3f cpi r25, 0xFF ; 255 + 632: 79 f0 breq .+30 ; 0x652 <__fp_splitA+0x2a> + 634: 87 95 ror r24 + 636: 08 95 ret + 638: 12 16 cp r1, r18 + 63a: 13 06 cpc r1, r19 + 63c: 14 06 cpc r1, r20 + 63e: 55 1f adc r21, r21 + 640: f2 cf rjmp .-28 ; 0x626 <__fp_split3+0xe> + 642: 46 95 lsr r20 + 644: f1 df rcall .-30 ; 0x628 <__fp_splitA> + 646: 08 c0 rjmp .+16 ; 0x658 <__fp_splitA+0x30> + 648: 16 16 cp r1, r22 + 64a: 17 06 cpc r1, r23 + 64c: 18 06 cpc r1, r24 + 64e: 99 1f adc r25, r25 + 650: f1 cf rjmp .-30 ; 0x634 <__fp_splitA+0xc> + 652: 86 95 lsr r24 + 654: 71 05 cpc r23, r1 + 656: 61 05 cpc r22, r1 + 658: 08 94 sec + 65a: 08 95 ret + +0000065c <__fp_zero>: + 65c: e8 94 clt + +0000065e <__fp_szero>: + 65e: bb 27 eor r27, r27 + 660: 66 27 eor r22, r22 + 662: 77 27 eor r23, r23 + 664: cb 01 movw r24, r22 + 666: 97 f9 bld r25, 7 + 668: 08 95 ret + +0000066a <__mulsf3>: + 66a: 0a d0 rcall .+20 ; 0x680 <__mulsf3x> + 66c: c4 cf rjmp .-120 ; 0x5f6 <__fp_round> + 66e: b5 df rcall .-150 ; 0x5da <__fp_pscA> + 670: 28 f0 brcs .+10 ; 0x67c <__mulsf3+0x12> + 672: ba df rcall .-140 ; 0x5e8 <__fp_pscB> + 674: 18 f0 brcs .+6 ; 0x67c <__mulsf3+0x12> + 676: 95 23 and r25, r21 + 678: 09 f0 breq .+2 ; 0x67c <__mulsf3+0x12> + 67a: a6 cf rjmp .-180 ; 0x5c8 <__fp_inf> + 67c: ab cf rjmp .-170 ; 0x5d4 <__fp_nan> + 67e: ef cf rjmp .-34 ; 0x65e <__fp_szero> + +00000680 <__mulsf3x>: + 680: cb df rcall .-106 ; 0x618 <__fp_split3> + 682: a8 f3 brcs .-22 ; 0x66e <__mulsf3+0x4> + +00000684 <__mulsf3_pse>: + 684: 99 23 and r25, r25 + 686: d9 f3 breq .-10 ; 0x67e <__mulsf3+0x14> + 688: 55 23 and r21, r21 + 68a: c9 f3 breq .-14 ; 0x67e <__mulsf3+0x14> + 68c: 95 0f add r25, r21 + 68e: 50 e0 ldi r21, 0x00 ; 0 + 690: 55 1f adc r21, r21 + 692: aa 27 eor r26, r26 + 694: ee 27 eor r30, r30 + 696: ff 27 eor r31, r31 + 698: bb 27 eor r27, r27 + 69a: 00 24 eor r0, r0 + 69c: 08 94 sec + 69e: 67 95 ror r22 + 6a0: 20 f4 brcc .+8 ; 0x6aa <__mulsf3_pse+0x26> + 6a2: e2 0f add r30, r18 + 6a4: f3 1f adc r31, r19 + 6a6: b4 1f adc r27, r20 + 6a8: 0a 1e adc r0, r26 + 6aa: 22 0f add r18, r18 + 6ac: 33 1f adc r19, r19 + 6ae: 44 1f adc r20, r20 + 6b0: aa 1f adc r26, r26 + 6b2: 66 95 lsr r22 + 6b4: a9 f7 brne .-22 ; 0x6a0 <__mulsf3_pse+0x1c> + 6b6: 77 95 ror r23 + 6b8: 30 f4 brcc .+12 ; 0x6c6 <__mulsf3_pse+0x42> + 6ba: f3 0f add r31, r19 + 6bc: b4 1f adc r27, r20 + 6be: 0a 1e adc r0, r26 + 6c0: 12 1e adc r1, r18 + 6c2: 08 f4 brcc .+2 ; 0x6c6 <__mulsf3_pse+0x42> + 6c4: 63 95 inc r22 + 6c6: 33 0f add r19, r19 + 6c8: 44 1f adc r20, r20 + 6ca: aa 1f adc r26, r26 + 6cc: 22 1f adc r18, r18 + 6ce: 76 95 lsr r23 + 6d0: 99 f7 brne .-26 ; 0x6b8 <__mulsf3_pse+0x34> + 6d2: 87 95 ror r24 + 6d4: 20 f4 brcc .+8 ; 0x6de <__mulsf3_pse+0x5a> + 6d6: b4 0f add r27, r20 + 6d8: 0a 1e adc r0, r26 + 6da: 12 1e adc r1, r18 + 6dc: 63 1f adc r22, r19 + 6de: 44 0f add r20, r20 + 6e0: aa 1f adc r26, r26 + 6e2: 22 1f adc r18, r18 + 6e4: 33 1f adc r19, r19 + 6e6: 86 95 lsr r24 + 6e8: a9 f7 brne .-22 ; 0x6d4 <__mulsf3_pse+0x50> + 6ea: 86 2f mov r24, r22 + 6ec: 71 2d mov r23, r1 + 6ee: 60 2d mov r22, r0 + 6f0: 11 24 eor r1, r1 + 6f2: 9f 57 subi r25, 0x7F ; 127 + 6f4: 50 40 sbci r21, 0x00 ; 0 + 6f6: 8a f0 brmi .+34 ; 0x71a <__mulsf3_pse+0x96> + 6f8: e1 f0 breq .+56 ; 0x732 <__mulsf3_pse+0xae> + 6fa: 88 23 and r24, r24 + 6fc: 4a f0 brmi .+18 ; 0x710 <__mulsf3_pse+0x8c> + 6fe: ee 0f add r30, r30 + 700: ff 1f adc r31, r31 + 702: bb 1f adc r27, r27 + 704: 66 1f adc r22, r22 + 706: 77 1f adc r23, r23 + 708: 88 1f adc r24, r24 + 70a: 91 50 subi r25, 0x01 ; 1 + 70c: 50 40 sbci r21, 0x00 ; 0 + 70e: a9 f7 brne .-22 ; 0x6fa <__mulsf3_pse+0x76> + 710: 9e 3f cpi r25, 0xFE ; 254 + 712: 51 05 cpc r21, r1 + 714: 70 f0 brcs .+28 ; 0x732 <__mulsf3_pse+0xae> + 716: 58 cf rjmp .-336 ; 0x5c8 <__fp_inf> + 718: a2 cf rjmp .-188 ; 0x65e <__fp_szero> + 71a: 5f 3f cpi r21, 0xFF ; 255 + 71c: ec f3 brlt .-6 ; 0x718 <__mulsf3_pse+0x94> + 71e: 98 3e cpi r25, 0xE8 ; 232 + 720: dc f3 brlt .-10 ; 0x718 <__mulsf3_pse+0x94> + 722: 86 95 lsr r24 + 724: 77 95 ror r23 + 726: 67 95 ror r22 + 728: b7 95 ror r27 + 72a: f7 95 ror r31 + 72c: e7 95 ror r30 + 72e: 9f 5f subi r25, 0xFF ; 255 + 730: c1 f7 brne .-16 ; 0x722 <__mulsf3_pse+0x9e> + 732: fe 2b or r31, r30 + 734: 88 0f add r24, r24 + 736: 91 1d adc r25, r1 + 738: 96 95 lsr r25 + 73a: 87 95 ror r24 + 73c: 97 f9 bld r25, 7 + 73e: 08 95 ret + +00000740 <_exit>: + 740: f8 94 cli + +00000742 <__stop_program>: + 742: ff cf rjmp .-2 ; 0x742 <__stop_program> diff --git a/firmware/Debug/dynamit.map b/firmware/Debug/dynamit.map new file mode 100644 index 0000000..220f258 --- /dev/null +++ b/firmware/Debug/dynamit.map @@ -0,0 +1,606 @@ +Archive member included to satisfy reference by file (symbol) + +c:/program files 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(x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(mulsf3.o) + 0x0000066a __mulsf3 + .text.avr-libc.fplib + 0x0000066e 0xd2 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(mulsf3x.o) + 0x00000680 __mulsf3x + 0x00000684 __mulsf3_pse + 0x00000740 . = ALIGN (0x2) + *(.fini9) + .fini9 0x00000740 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr25/tiny-stack\libgcc.a(_exit.o) + 0x00000740 _exit + 0x00000740 exit + *(.fini9) + *(.fini8) + *(.fini8) + *(.fini7) + *(.fini7) + *(.fini6) + *(.fini6) + *(.fini5) + *(.fini5) + *(.fini4) + *(.fini4) + *(.fini3) + *(.fini3) + *(.fini2) + *(.fini2) + *(.fini1) + *(.fini1) + *(.fini0) + .fini0 0x00000740 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr25/tiny-stack\libgcc.a(_exit.o) + *(.fini0) + 0x00000744 _etext = . + +.data 0x00800060 0x18 load address 0x00000744 + 0x00800060 PROVIDE (__data_start, .) + *(.data) + *(.data*) + .data.ten_sec 0x00800060 0x1 main.o + 0x00800060 ten_sec + .data.numbers_msb + 0x00800061 0x16 main.o + 0x00800061 numbers_msb + *(.gnu.linkonce.d*) + *(.rodata) + *(.rodata*) + *(.gnu.linkonce.r*) + 0x00800078 . = ALIGN (0x2) + *fill* 0x00800077 0x1 + 0x00800078 _edata = . + 0x00800078 PROVIDE (__data_end, .) + +.bss 0x00800078 0x3 + 0x00800078 PROVIDE (__bss_start, .) + *(.bss) + *(.bss*) + .bss.boom 0x00800078 0x1 main.o + 0x00800078 boom + .bss.sec_ten 0x00800079 0x1 main.o + 0x00800079 sec_ten + .bss.sec 0x0080007a 0x1 main.o + 0x0080007a sec + *(COMMON) + 0x0080007b PROVIDE (__bss_end, .) + 0x00000744 __data_load_start = LOADADDR (.data) + 0x0000075c __data_load_end = (__data_load_start + SIZEOF (.data)) + +.noinit 0x0080007b 0x0 + [!provide] PROVIDE (__noinit_start, .) + *(.noinit*) + [!provide] PROVIDE (__noinit_end, .) + 0x0080007b _end = . + [!provide] PROVIDE (__heap_start, .) + +.eeprom 0x00810000 0x0 + *(.eeprom*) + 0x00810000 __eeprom_end = . + +.fuse + *(.fuse) + *(.lfuse) + *(.hfuse) + *(.efuse) + +.lock + *(.lock*) + +.signature + *(.signature*) + +.user_signatures + *(.user_signatures*) + +.stab + *(.stab) + +.stabstr + *(.stabstr) + +.stab.excl + *(.stab.excl) + +.stab.exclstr + *(.stab.exclstr) + +.stab.index + *(.stab.index) + +.stab.indexstr + *(.stab.indexstr) + +.comment 0x00000000 0x30 + *(.comment) + .comment 0x00000000 0x30 main.o + 0x31 (size before relaxing) + +.note.gnu.avr.deviceinfo + 0x00000000 0x40 + .note.gnu.avr.deviceinfo + 0x00000000 0x40 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny2313/avr25/tiny-stack/crtattiny2313.o + +.note.gnu.build-id + *(.note.gnu.build-id) + +.debug + *(.debug) + +.line + *(.line) + +.debug_srcinfo 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0x00000000 0x104 + *(.debug_frame) + .debug_frame 0x00000000 0x104 main.o + +.debug_str 0x00000000 0x374 + *(.debug_str) + .debug_str 0x00000000 0x163 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny2313/avr25/tiny-stack/crtattiny2313.o + .debug_str 0x00000163 0x211 main.o + 0x24c (size before relaxing) + +.debug_loc 0x00000000 0x281 + *(.debug_loc) + .debug_loc 0x00000000 0x281 main.o + +.debug_macinfo + *(.debug_macinfo) + +.debug_weaknames + *(.debug_weaknames) + +.debug_funcnames + *(.debug_funcnames) + +.debug_typenames + *(.debug_typenames) + +.debug_varnames + *(.debug_varnames) + +.debug_pubtypes + *(.debug_pubtypes) + +.debug_ranges 0x00000000 0x40 + *(.debug_ranges) + .debug_ranges 0x00000000 0x40 main.o + +.debug_macro + *(.debug_macro) +OUTPUT(dynamit.elf elf32-avr) +LOAD linker stubs diff --git a/firmware/Debug/dynamit.srec b/firmware/Debug/dynamit.srec new file mode 100644 index 0000000..b238361 --- /dev/null +++ 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(x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include/avr/iotn2313.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include/avr/iotn2313.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h: diff --git a/firmware/Debug/main.o b/firmware/Debug/main.o new file mode 100644 index 0000000..bc253c4 Binary files /dev/null and b/firmware/Debug/main.o differ diff --git a/firmware/Debug/makedep.mk b/firmware/Debug/makedep.mk new file mode 100644 index 0000000..2925510 --- /dev/null +++ b/firmware/Debug/makedep.mk @@ -0,0 +1,6 @@ +################################################################################ +# Automatically-generated file. Do not edit or delete the file +################################################################################ + +main.c + diff --git a/firmware/Release/Makefile b/firmware/Release/Makefile new file mode 100644 index 0000000..3606931 --- /dev/null +++ b/firmware/Release/Makefile @@ -0,0 +1,127 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +SHELL := cmd.exe +RM := rm -rf + +USER_OBJS := + +LIBS := +PROJ := + +O_SRCS := +C_SRCS := +S_SRCS := +S_UPPER_SRCS := +OBJ_SRCS := +ASM_SRCS := +PREPROCESSING_SRCS := +OBJS := +OBJS_AS_ARGS := +C_DEPS := +C_DEPS_AS_ARGS := +EXECUTABLES := +OUTPUT_FILE_PATH := +OUTPUT_FILE_PATH_AS_ARGS := +AVR_APP_PATH :=$$$AVR_APP_PATH$$$ +QUOTE := " +ADDITIONAL_DEPENDENCIES:= +OUTPUT_FILE_DEP:= +LIB_DEP:= +LINKER_SCRIPT_DEP:= + +# Every subdirectory with source files must be described here +SUBDIRS := + + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../main.c + + +PREPROCESSING_SRCS += + + +ASM_SRCS += + + +OBJS += \ +main.o + +OBJS_AS_ARGS += \ +main.o + +C_DEPS += \ +main.d + +C_DEPS_AS_ARGS += \ +main.d + +OUTPUT_FILE_PATH +=dynamit.elf + +OUTPUT_FILE_PATH_AS_ARGS +=dynamit.elf + +ADDITIONAL_DEPENDENCIES:= + +OUTPUT_FILE_DEP:= ./makedep.mk + +LIB_DEP+= + +LINKER_SCRIPT_DEP+= + + +# AVR32/GNU C Compiler +./main.o: .././main.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DNDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include" -Os -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -Wall -mmcu=attiny2313 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + + + + +# AVR32/GNU Preprocessing Assembler + + + +# AVR32/GNU Assembler + + + + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +# Add inputs and outputs from these tool invocations to the build variables + +# All Target +all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES) + +$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP) + @echo Building target: $@ + @echo Invoking: AVR/GNU Linker : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="dynamit.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mmcu=attiny2313 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313" + @echo Finished building target: $@ + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "dynamit.elf" "dynamit.hex" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "dynamit.elf" "dynamit.eep" || exit 0 + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "dynamit.elf" > "dynamit.lss" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "dynamit.elf" "dynamit.srec" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "dynamit.elf" + + + + + + + +# Other Targets +clean: + -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES) + -$(RM) $(C_DEPS_AS_ARGS) + rm -rf "dynamit.elf" "dynamit.a" "dynamit.hex" "dynamit.lss" "dynamit.eep" "dynamit.map" "dynamit.srec" "dynamit.usersignatures" + \ No newline at end of file diff --git a/firmware/Release/dynamit.eep b/firmware/Release/dynamit.eep new file mode 100644 index 0000000..1996e8f --- /dev/null +++ b/firmware/Release/dynamit.eep @@ -0,0 +1 @@ +:00000001FF diff --git a/firmware/Release/dynamit.elf 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READONLY, CODE + 1 .data 00000018 00800060 00000736 000007ca 2**0 + CONTENTS, ALLOC, LOAD, DATA + 2 .bss 00000003 00800078 00800078 000007e2 2**0 + ALLOC + 3 .comment 00000030 00000000 00000000 000007e2 2**0 + CONTENTS, READONLY + 4 .note.gnu.avr.deviceinfo 00000040 00000000 00000000 00000814 2**2 + CONTENTS, READONLY + 5 .debug_info 0000040e 00000000 00000000 00000854 2**0 + CONTENTS, READONLY, DEBUGGING + 6 .debug_abbrev 000003d7 00000000 00000000 00000c62 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_line 00000101 00000000 00000000 00001039 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_str 00000163 00000000 00000000 0000113a 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +00000000 <__vectors>: + 0: 12 c0 rjmp .+36 ; 0x26 <__ctors_end> + 2: 2a c0 rjmp .+84 ; 0x58 <__bad_interrupt> + 4: 29 c0 rjmp .+82 ; 0x58 <__bad_interrupt> + 6: 28 c0 rjmp .+80 ; 0x58 <__bad_interrupt> + 8: 27 c0 rjmp .+78 ; 0x58 <__bad_interrupt> + a: 26 c0 rjmp .+76 ; 0x58 <__bad_interrupt> + c: 25 c0 rjmp .+74 ; 0x58 <__bad_interrupt> + e: 24 c0 rjmp .+72 ; 0x58 <__bad_interrupt> + 10: 23 c0 rjmp .+70 ; 0x58 <__bad_interrupt> + 12: 22 c0 rjmp .+68 ; 0x58 <__bad_interrupt> + 14: 21 c0 rjmp .+66 ; 0x58 <__bad_interrupt> + 16: 20 c0 rjmp .+64 ; 0x58 <__bad_interrupt> + 18: 20 c0 rjmp .+64 ; 0x5a <__vector_12> + 1a: ec c0 rjmp .+472 ; 0x1f4 <__vector_13> + 1c: 1d c0 rjmp .+58 ; 0x58 <__bad_interrupt> + 1e: 1c c0 rjmp .+56 ; 0x58 <__bad_interrupt> + 20: 1b c0 rjmp .+54 ; 0x58 <__bad_interrupt> + 22: 1a c0 rjmp .+52 ; 0x58 <__bad_interrupt> + 24: 19 c0 rjmp .+50 ; 0x58 <__bad_interrupt> + +00000026 <__ctors_end>: + 26: 11 24 eor r1, r1 + 28: 1f be out 0x3f, r1 ; 63 + 2a: cf ed ldi r28, 0xDF ; 223 + 2c: cd bf out 0x3d, r28 ; 61 + +0000002e <__do_copy_data>: + 2e: 10 e0 ldi r17, 0x00 ; 0 + 30: a0 e6 ldi r26, 0x60 ; 96 + 32: b0 e0 ldi r27, 0x00 ; 0 + 34: e6 e3 ldi r30, 0x36 ; 54 + 36: f7 e0 ldi r31, 0x07 ; 7 + 38: 02 c0 rjmp .+4 ; 0x3e <__SP_L__+0x1> + 3a: 05 90 lpm r0, Z+ + 3c: 0d 92 st X+, r0 + 3e: a8 37 cpi r26, 0x78 ; 120 + 40: b1 07 cpc r27, r17 + 42: d9 f7 brne .-10 ; 0x3a <__do_copy_data+0xc> + +00000044 <__do_clear_bss>: + 44: 20 e0 ldi r18, 0x00 ; 0 + 46: a8 e7 ldi r26, 0x78 ; 120 + 48: b0 e0 ldi r27, 0x00 ; 0 + 4a: 01 c0 rjmp .+2 ; 0x4e <.do_clear_bss_start> + +0000004c <.do_clear_bss_loop>: + 4c: 1d 92 st X+, r1 + +0000004e <.do_clear_bss_start>: + 4e: ab 37 cpi r26, 0x7B ; 123 + 50: b2 07 cpc r27, r18 + 52: e1 f7 brne .-8 ; 0x4c <.do_clear_bss_loop> + 54: 7e d0 rcall .+252 ; 0x152
+ 56: 6d c3 rjmp .+1754 ; 0x732 <_exit> + +00000058 <__bad_interrupt>: + 58: d3 cf rjmp .-90 ; 0x0 <__vectors> + +0000005a <__vector_12>: + 5a: 1f 92 push r1 + 5c: 0f 92 push r0 + 5e: 0f b6 in r0, 0x3f ; 63 + 60: 0f 92 push r0 + 62: 11 24 eor r1, r1 + 64: 8f 93 push r24 + 66: 9f 93 push r25 + 68: 98 b3 in r25, 0x18 ; 24 + 6a: 80 e1 ldi r24, 0x10 ; 16 + 6c: 89 27 eor r24, r25 + 6e: 88 bb out 0x18, r24 ; 24 + 70: 9f 91 pop r25 + 72: 8f 91 pop r24 + 74: 0f 90 pop r0 + 76: 0f be out 0x3f, r0 ; 63 + 78: 0f 90 pop r0 + 7a: 1f 90 pop r1 + 7c: 18 95 reti + +0000007e : + 7e: 27 e0 ldi r18, 0x07 ; 7 + 80: 30 e0 ldi r19, 0x00 ; 0 + 82: 48 2f mov r20, r24 + 84: 50 e0 ldi r21, 0x00 ; 0 + 86: 80 e1 ldi r24, 0x10 ; 16 + 88: ba 01 movw r22, r20 + 8a: 02 2e mov r0, r18 + 8c: 02 c0 rjmp .+4 ; 0x92 <__DATA_REGION_LENGTH__+0x12> + 8e: 75 95 asr r23 + 90: 67 95 ror r22 + 92: 0a 94 dec r0 + 94: e2 f7 brpl .-8 ; 0x8e <__DATA_REGION_LENGTH__+0xe> + 96: 60 ff sbrs r22, 0 + 98: 02 c0 rjmp .+4 ; 0x9e <__DATA_REGION_LENGTH__+0x1e> + 9a: 92 9a sbi 0x12, 2 ; 18 + 9c: 01 c0 rjmp .+2 ; 0xa0 <__DATA_REGION_LENGTH__+0x20> + 9e: 92 98 cbi 0x12, 2 ; 18 + a0: 92 b3 in r25, 0x12 ; 18 + a2: 98 27 eor r25, r24 + a4: 92 bb out 0x12, r25 ; 18 + a6: 92 b3 in r25, 0x12 ; 18 + a8: 98 27 eor r25, r24 + aa: 92 bb out 0x12, r25 ; 18 + ac: 21 50 subi r18, 0x01 ; 1 + ae: 31 09 sbc r19, r1 + b0: 58 f7 brcc .-42 ; 0x88 <__DATA_REGION_LENGTH__+0x8> + b2: 08 95 ret + +000000b4 : + b4: 1f 93 push r17 + b6: cf 93 push r28 + b8: df 93 push r29 + ba: 14 2f mov r17, r20 + bc: f8 94 cli + be: ec 01 movw r28, r24 + c0: cc 0f add r28, r28 + c2: dd 1f adc r29, r29 + c4: cf 59 subi r28, 0x9F ; 159 + c6: df 4f sbci r29, 0xFF ; 255 + c8: 89 81 ldd r24, Y+1 ; 0x01 + ca: 86 23 and r24, r22 + cc: d8 df rcall .-80 ; 0x7e + ce: 88 81 ld r24, Y + d0: 81 23 and r24, r17 + d2: d5 df rcall .-86 ; 0x7e + d4: 92 b3 in r25, 0x12 ; 18 + d6: 88 e0 ldi r24, 0x08 ; 8 + d8: 98 27 eor r25, r24 + da: 92 bb out 0x12, r25 ; 18 + dc: 92 b3 in r25, 0x12 ; 18 + de: 89 27 eor r24, r25 + e0: 82 bb out 0x12, r24 ; 18 + e2: 78 94 sei + e4: df 91 pop r29 + e6: cf 91 pop r28 + e8: 1f 91 pop r17 + ea: 08 95 ret + +000000ec : + ec: 8e b5 in r24, 0x2e ; 46 + ee: 88 7f andi r24, 0xF8 ; 248 + f0: 8e bd out 0x2e, r24 ; 46 + f2: 88 b3 in r24, 0x18 ; 24 + f4: 88 bb out 0x18, r24 ; 24 + f6: 08 95 ret + +000000f8 : + f8: f8 94 cli + fa: 80 31 cpi r24, 0x10 ; 16 + fc: 27 e2 ldi r18, 0x27 ; 39 + fe: 92 07 cpc r25, r18 + 100: 08 f0 brcs .+2 ; 0x104 + 102: f4 cf rjmp .-24 ; 0xec + 104: bc 01 movw r22, r24 + 106: 80 e0 ldi r24, 0x00 ; 0 + 108: 90 e0 ldi r25, 0x00 ; 0 + 10a: 1a d2 rcall .+1076 ; 0x540 <__floatunsisf> + 10c: 20 e0 ldi r18, 0x00 ; 0 + 10e: 30 e0 ldi r19, 0x00 ; 0 + 110: 42 e8 ldi r20, 0x82 ; 130 + 112: 52 e4 ldi r21, 0x42 ; 66 + 114: a3 d2 rcall .+1350 ; 0x65c <__mulsf3> + 116: 9b 01 movw r18, r22 + 118: ac 01 movw r20, r24 + 11a: 68 e2 ldi r22, 0x28 ; 40 + 11c: 7b e6 ldi r23, 0x6B ; 107 + 11e: 8e e6 ldi r24, 0x6E ; 110 + 120: 9e e4 ldi r25, 0x4E ; 78 + 122: 7a d1 rcall .+756 ; 0x418 <__divsf3> + 124: 20 e0 ldi r18, 0x00 ; 0 + 126: 30 e0 ldi r19, 0x00 ; 0 + 128: 40 e0 ldi r20, 0x00 ; 0 + 12a: 5f e3 ldi r21, 0x3F ; 63 + 12c: 97 d2 rcall .+1326 ; 0x65c <__mulsf3> + 12e: dc d1 rcall .+952 ; 0x4e8 <__fixunssfsi> + 130: 7b bd out 0x2b, r23 ; 43 + 132: 6a bd out 0x2a, r22 ; 42 + 134: 6a b5 in r22, 0x2a ; 42 + 136: 7b b5 in r23, 0x2b ; 43 + 138: 80 e0 ldi r24, 0x00 ; 0 + 13a: 90 e0 ldi r25, 0x00 ; 0 + 13c: 01 d2 rcall .+1026 ; 0x540 <__floatunsisf> + 13e: 25 ec ldi r18, 0xC5 ; 197 + 140: 3e e4 ldi r19, 0x4E ; 78 + 142: 40 e4 ldi r20, 0x40 ; 64 + 144: 54 e4 ldi r21, 0x44 ; 68 + 146: 03 d1 rcall .+518 ; 0x34e <__subsf3> + 148: cf d1 rcall .+926 ; 0x4e8 <__fixunssfsi> + 14a: 79 bd out 0x29, r23 ; 41 + 14c: 68 bd out 0x28, r22 ; 40 + 14e: 78 94 sei + 150: 08 95 ret + +00000152
: + 152: f8 94 cli + 154: 80 b7 in r24, 0x30 ; 48 + 156: 82 60 ori r24, 0x02 ; 2 + 158: 80 bf out 0x30, r24 ; 48 + 15a: 89 b7 in r24, 0x39 ; 57 + 15c: 81 60 ori r24, 0x01 ; 1 + 15e: 89 bf out 0x39, r24 ; 57 + 160: 8a e5 ldi r24, 0x5A ; 90 + 162: 86 bf out 0x36, r24 ; 54 + 164: 8f b5 in r24, 0x2f ; 47 + 166: 83 60 ori r24, 0x03 ; 3 + 168: 8f bd out 0x2f, r24 ; 47 + 16a: 8e b5 in r24, 0x2e ; 46 + 16c: 80 61 ori r24, 0x10 ; 16 + 16e: 8e bd out 0x2e, r24 ; 46 + 170: 89 b7 in r24, 0x39 ; 57 + 172: 80 62 ori r24, 0x20 ; 32 + 174: 89 bf out 0x39, r24 ; 57 + 176: 8c e1 ldi r24, 0x1C ; 28 + 178: 81 bb out 0x11, r24 ; 17 + 17a: 80 e1 ldi r24, 0x10 ; 16 + 17c: 87 bb out 0x17, r24 ; 23 + 17e: 12 ba out 0x12, r1 ; 18 + 180: 78 94 sei + 182: b1 9b sbis 0x16, 1 ; 22 + 184: 13 c0 rjmp .+38 ; 0x1ac + 186: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 18a: 47 ef ldi r20, 0xF7 ; 247 + 18c: 6f eb ldi r22, 0xBF ; 191 + 18e: 90 e0 ldi r25, 0x00 ; 0 + 190: 91 df rcall .-222 ; 0xb4 + 192: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 196: 4f ef ldi r20, 0xFF ; 255 + 198: 6f e7 ldi r22, 0x7F ; 127 + 19a: 90 e0 ldi r25, 0x00 ; 0 + 19c: 8b df rcall .-234 ; 0xb4 + 19e: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 1a2: 4f ef ldi r20, 0xFF ; 255 + 1a4: 6f ed ldi r22, 0xDF ; 223 + 1a6: 90 e0 ldi r25, 0x00 ; 0 + 1a8: 85 df rcall .-246 ; 0xb4 + 1aa: eb cf rjmp .-42 ; 0x182 + 1ac: 83 b7 in r24, 0x33 ; 51 + 1ae: 85 60 ori r24, 0x05 ; 5 + 1b0: 83 bf out 0x33, r24 ; 51 + 1b2: 88 ec ldi r24, 0xC8 ; 200 + 1b4: 90 e0 ldi r25, 0x00 ; 0 + 1b6: a0 df rcall .-192 ; 0xf8 + 1b8: 8e b5 in r24, 0x2e ; 46 + 1ba: 83 60 ori r24, 0x03 ; 3 + 1bc: 8e bd out 0x2e, r24 ; 46 + 1be: 80 91 78 00 lds r24, 0x0078 ; 0x800078 <__data_end> + 1c2: 88 23 and r24, r24 + 1c4: 21 f0 breq .+8 ; 0x1ce + 1c6: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 1ca: 4f ef ldi r20, 0xFF ; 255 + 1cc: 03 c0 rjmp .+6 ; 0x1d4 + 1ce: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 1d2: 47 ef ldi r20, 0xF7 ; 247 + 1d4: 6f eb ldi r22, 0xBF ; 191 + 1d6: 90 e0 ldi r25, 0x00 ; 0 + 1d8: 6d df rcall .-294 ; 0xb4 + 1da: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 1de: 4f ef ldi r20, 0xFF ; 255 + 1e0: 6f e7 ldi r22, 0x7F ; 127 + 1e2: 90 e0 ldi r25, 0x00 ; 0 + 1e4: 67 df rcall .-306 ; 0xb4 + 1e6: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 1ea: 4f ef ldi r20, 0xFF ; 255 + 1ec: 6f ed ldi r22, 0xDF ; 223 + 1ee: 90 e0 ldi r25, 0x00 ; 0 + 1f0: 61 df rcall .-318 ; 0xb4 + 1f2: e5 cf rjmp .-54 ; 0x1be + +000001f4 <__vector_13>: + 1f4: 1f 92 push r1 + 1f6: 0f 92 push r0 + 1f8: 0f b6 in r0, 0x3f ; 63 + 1fa: 0f 92 push r0 + 1fc: 11 24 eor r1, r1 + 1fe: cf 92 push r12 + 200: df 92 push r13 + 202: ef 92 push r14 + 204: ff 92 push r15 + 206: 2f 93 push r18 + 208: 3f 93 push r19 + 20a: 4f 93 push r20 + 20c: 5f 93 push r21 + 20e: 6f 93 push r22 + 210: 7f 93 push r23 + 212: 8f 93 push r24 + 214: 9f 93 push r25 + 216: af 93 push r26 + 218: bf 93 push r27 + 21a: cf 93 push r28 + 21c: ef 93 push r30 + 21e: ff 93 push r31 + 220: 80 91 78 00 lds r24, 0x0078 ; 0x800078 <__data_end> + 224: 80 ff sbrs r24, 0 + 226: 09 c0 rjmp .+18 ; 0x23a <__vector_13+0x46> + 228: 8a e0 ldi r24, 0x0A ; 10 + 22a: 80 93 60 00 sts 0x0060, r24 ; 0x800060 <__DATA_REGION_ORIGIN__> + 22e: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a + 232: 80 93 79 00 sts 0x0079, r24 ; 0x800079 + 236: 82 e0 ldi r24, 0x02 ; 2 + 238: 0c c0 rjmp .+24 ; 0x252 <__vector_13+0x5e> + 23a: 80 91 78 00 lds r24, 0x0078 ; 0x800078 <__data_end> + 23e: 81 ff sbrs r24, 1 + 240: 0b c0 rjmp .+22 ; 0x258 <__vector_13+0x64> + 242: 18 ba out 0x18, r1 ; 24 + 244: 10 92 60 00 sts 0x0060, r1 ; 0x800060 <__DATA_REGION_ORIGIN__> + 248: 10 92 7a 00 sts 0x007A, r1 ; 0x80007a + 24c: 10 92 79 00 sts 0x0079, r1 ; 0x800079 + 250: 81 e0 ldi r24, 0x01 ; 1 + 252: 80 93 78 00 sts 0x0078, r24 ; 0x800078 <__data_end> + 256: 65 c0 rjmp .+202 ; 0x322 <__vector_13+0x12e> + 258: 60 91 60 00 lds r22, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 25c: c0 91 7a 00 lds r28, 0x007A ; 0x80007a + 260: 70 e0 ldi r23, 0x00 ; 0 + 262: 80 e0 ldi r24, 0x00 ; 0 + 264: 90 e0 ldi r25, 0x00 ; 0 + 266: 6e d1 rcall .+732 ; 0x544 <__floatsisf> + 268: 20 e0 ldi r18, 0x00 ; 0 + 26a: 30 e0 ldi r19, 0x00 ; 0 + 26c: 40 e2 ldi r20, 0x20 ; 32 + 26e: 51 e4 ldi r21, 0x41 ; 65 + 270: f5 d1 rcall .+1002 ; 0x65c <__mulsf3> + 272: 6b 01 movw r12, r22 + 274: 7c 01 movw r14, r24 + 276: 6c 2f mov r22, r28 + 278: 70 e0 ldi r23, 0x00 ; 0 + 27a: 80 e0 ldi r24, 0x00 ; 0 + 27c: 90 e0 ldi r25, 0x00 ; 0 + 27e: 62 d1 rcall .+708 ; 0x544 <__floatsisf> + 280: 9b 01 movw r18, r22 + 282: ac 01 movw r20, r24 + 284: c7 01 movw r24, r14 + 286: b6 01 movw r22, r12 + 288: 63 d0 rcall .+198 ; 0x350 <__addsf3> + 28a: 2d ec ldi r18, 0xCD ; 205 + 28c: 3c ec ldi r19, 0xCC ; 204 + 28e: 4c ec ldi r20, 0xCC ; 204 + 290: 5d e3 ldi r21, 0x3D ; 61 + 292: 5e d0 rcall .+188 ; 0x350 <__addsf3> + 294: 9b 01 movw r18, r22 + 296: ac 01 movw r20, r24 + 298: 60 e0 ldi r22, 0x00 ; 0 + 29a: 70 e8 ldi r23, 0x80 ; 128 + 29c: 8b e3 ldi r24, 0x3B ; 59 + 29e: 96 e4 ldi r25, 0x46 ; 70 + 2a0: bb d0 rcall .+374 ; 0x418 <__divsf3> + 2a2: 22 d1 rcall .+580 ; 0x4e8 <__fixunssfsi> + 2a4: cb 01 movw r24, r22 + 2a6: 28 df rcall .-432 ; 0xf8 + 2a8: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 2ac: 81 11 cpse r24, r1 + 2ae: 14 c0 rjmp .+40 ; 0x2d8 <__vector_13+0xe4> + 2b0: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 2b4: 81 11 cpse r24, r1 + 2b6: 10 c0 rjmp .+32 ; 0x2d8 <__vector_13+0xe4> + 2b8: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 2bc: 88 23 and r24, r24 + 2be: 61 f0 breq .+24 ; 0x2d8 <__vector_13+0xe4> + 2c0: 10 92 60 00 sts 0x0060, r1 ; 0x800060 <__DATA_REGION_ORIGIN__> + 2c4: 10 92 7a 00 sts 0x007A, r1 ; 0x80007a + 2c8: 10 92 79 00 sts 0x0079, r1 ; 0x800079 + 2cc: 81 e0 ldi r24, 0x01 ; 1 + 2ce: 80 93 78 00 sts 0x0078, r24 ; 0x800078 <__data_end> + 2d2: 84 ec ldi r24, 0xC4 ; 196 + 2d4: 86 bf out 0x36, r24 ; 54 + 2d6: 25 c0 rjmp .+74 ; 0x322 <__vector_13+0x12e> + 2d8: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 2dc: 81 11 cpse r24, r1 + 2de: 0f c0 rjmp .+30 ; 0x2fe <__vector_13+0x10a> + 2e0: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 2e4: 81 11 cpse r24, r1 + 2e6: 0b c0 rjmp .+22 ; 0x2fe <__vector_13+0x10a> + 2e8: 89 e0 ldi r24, 0x09 ; 9 + 2ea: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a + 2ee: 80 93 79 00 sts 0x0079, r24 ; 0x800079 + 2f2: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <__DATA_REGION_ORIGIN__> + 2f6: 81 50 subi r24, 0x01 ; 1 + 2f8: 80 93 60 00 sts 0x0060, r24 ; 0x800060 <__DATA_REGION_ORIGIN__> + 2fc: 12 c0 rjmp .+36 ; 0x322 <__vector_13+0x12e> + 2fe: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 302: 81 11 cpse r24, r1 + 304: 09 c0 rjmp .+18 ; 0x318 <__vector_13+0x124> + 306: 89 e0 ldi r24, 0x09 ; 9 + 308: 80 93 79 00 sts 0x0079, r24 ; 0x800079 + 30c: 80 91 7a 00 lds r24, 0x007A ; 0x80007a + 310: 81 50 subi r24, 0x01 ; 1 + 312: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a + 316: 05 c0 rjmp .+10 ; 0x322 <__vector_13+0x12e> + 318: 80 91 79 00 lds r24, 0x0079 ; 0x800079 + 31c: 81 50 subi r24, 0x01 ; 1 + 31e: 80 93 79 00 sts 0x0079, r24 ; 0x800079 + 322: ff 91 pop r31 + 324: ef 91 pop r30 + 326: cf 91 pop r28 + 328: bf 91 pop r27 + 32a: af 91 pop r26 + 32c: 9f 91 pop r25 + 32e: 8f 91 pop r24 + 330: 7f 91 pop r23 + 332: 6f 91 pop r22 + 334: 5f 91 pop r21 + 336: 4f 91 pop r20 + 338: 3f 91 pop r19 + 33a: 2f 91 pop r18 + 33c: ff 90 pop r15 + 33e: ef 90 pop r14 + 340: df 90 pop r13 + 342: cf 90 pop r12 + 344: 0f 90 pop r0 + 346: 0f be out 0x3f, r0 ; 63 + 348: 0f 90 pop r0 + 34a: 1f 90 pop r1 + 34c: 18 95 reti + +0000034e <__subsf3>: + 34e: 50 58 subi r21, 0x80 ; 128 + +00000350 <__addsf3>: + 350: bb 27 eor r27, r27 + 352: aa 27 eor r26, r26 + 354: 0e d0 rcall .+28 ; 0x372 <__addsf3x> + 356: 48 c1 rjmp .+656 ; 0x5e8 <__fp_round> + 358: 39 d1 rcall .+626 ; 0x5cc <__fp_pscA> + 35a: 30 f0 brcs .+12 ; 0x368 <__addsf3+0x18> + 35c: 3e d1 rcall .+636 ; 0x5da <__fp_pscB> + 35e: 20 f0 brcs .+8 ; 0x368 <__addsf3+0x18> + 360: 31 f4 brne .+12 ; 0x36e <__addsf3+0x1e> + 362: 9f 3f cpi r25, 0xFF ; 255 + 364: 11 f4 brne .+4 ; 0x36a <__addsf3+0x1a> + 366: 1e f4 brtc .+6 ; 0x36e <__addsf3+0x1e> + 368: 2e c1 rjmp .+604 ; 0x5c6 <__fp_nan> + 36a: 0e f4 brtc .+2 ; 0x36e <__addsf3+0x1e> + 36c: e0 95 com r30 + 36e: e7 fb bst r30, 7 + 370: 24 c1 rjmp .+584 ; 0x5ba <__fp_inf> + +00000372 <__addsf3x>: + 372: e9 2f mov r30, r25 + 374: 4a d1 rcall .+660 ; 0x60a <__fp_split3> + 376: 80 f3 brcs .-32 ; 0x358 <__addsf3+0x8> + 378: ba 17 cp r27, r26 + 37a: 62 07 cpc r22, r18 + 37c: 73 07 cpc r23, r19 + 37e: 84 07 cpc r24, r20 + 380: 95 07 cpc r25, r21 + 382: 18 f0 brcs .+6 ; 0x38a <__addsf3x+0x18> + 384: 71 f4 brne .+28 ; 0x3a2 <__addsf3x+0x30> + 386: 9e f5 brtc .+102 ; 0x3ee <__addsf3x+0x7c> + 388: 62 c1 rjmp .+708 ; 0x64e <__fp_zero> + 38a: 0e f4 brtc .+2 ; 0x38e <__addsf3x+0x1c> + 38c: e0 95 com r30 + 38e: 0b 2e mov r0, r27 + 390: ba 2f mov r27, r26 + 392: a0 2d mov r26, r0 + 394: 0b 01 movw r0, r22 + 396: b9 01 movw r22, r18 + 398: 90 01 movw r18, r0 + 39a: 0c 01 movw r0, r24 + 39c: ca 01 movw r24, r20 + 39e: a0 01 movw r20, r0 + 3a0: 11 24 eor r1, r1 + 3a2: ff 27 eor r31, r31 + 3a4: 59 1b sub r21, r25 + 3a6: 99 f0 breq .+38 ; 0x3ce <__addsf3x+0x5c> + 3a8: 59 3f cpi r21, 0xF9 ; 249 + 3aa: 50 f4 brcc .+20 ; 0x3c0 <__addsf3x+0x4e> + 3ac: 50 3e cpi r21, 0xE0 ; 224 + 3ae: 68 f1 brcs .+90 ; 0x40a <__LOCK_REGION_LENGTH__+0xa> + 3b0: 1a 16 cp r1, r26 + 3b2: f0 40 sbci r31, 0x00 ; 0 + 3b4: a2 2f mov r26, r18 + 3b6: 23 2f mov r18, r19 + 3b8: 34 2f mov r19, r20 + 3ba: 44 27 eor r20, r20 + 3bc: 58 5f subi r21, 0xF8 ; 248 + 3be: f3 cf rjmp .-26 ; 0x3a6 <__addsf3x+0x34> + 3c0: 46 95 lsr r20 + 3c2: 37 95 ror r19 + 3c4: 27 95 ror r18 + 3c6: a7 95 ror r26 + 3c8: f0 40 sbci r31, 0x00 ; 0 + 3ca: 53 95 inc r21 + 3cc: c9 f7 brne .-14 ; 0x3c0 <__addsf3x+0x4e> + 3ce: 7e f4 brtc .+30 ; 0x3ee <__addsf3x+0x7c> + 3d0: 1f 16 cp r1, r31 + 3d2: ba 0b sbc r27, r26 + 3d4: 62 0b sbc r22, r18 + 3d6: 73 0b sbc r23, r19 + 3d8: 84 0b sbc r24, r20 + 3da: ba f0 brmi .+46 ; 0x40a <__LOCK_REGION_LENGTH__+0xa> + 3dc: 91 50 subi r25, 0x01 ; 1 + 3de: a1 f0 breq .+40 ; 0x408 <__LOCK_REGION_LENGTH__+0x8> + 3e0: ff 0f add r31, r31 + 3e2: bb 1f adc r27, r27 + 3e4: 66 1f adc r22, r22 + 3e6: 77 1f adc r23, r23 + 3e8: 88 1f adc r24, r24 + 3ea: c2 f7 brpl .-16 ; 0x3dc <__addsf3x+0x6a> + 3ec: 0e c0 rjmp .+28 ; 0x40a <__LOCK_REGION_LENGTH__+0xa> + 3ee: ba 0f add r27, r26 + 3f0: 62 1f adc r22, r18 + 3f2: 73 1f adc r23, r19 + 3f4: 84 1f adc r24, r20 + 3f6: 48 f4 brcc .+18 ; 0x40a <__LOCK_REGION_LENGTH__+0xa> + 3f8: 87 95 ror r24 + 3fa: 77 95 ror r23 + 3fc: 67 95 ror r22 + 3fe: b7 95 ror r27 + 400: f7 95 ror r31 + 402: 9e 3f cpi r25, 0xFE ; 254 + 404: 08 f0 brcs .+2 ; 0x408 <__LOCK_REGION_LENGTH__+0x8> + 406: b3 cf rjmp .-154 ; 0x36e <__addsf3+0x1e> + 408: 93 95 inc r25 + 40a: 88 0f add r24, r24 + 40c: 08 f0 brcs .+2 ; 0x410 <__LOCK_REGION_LENGTH__+0x10> + 40e: 99 27 eor r25, r25 + 410: ee 0f add r30, r30 + 412: 97 95 ror r25 + 414: 87 95 ror r24 + 416: 08 95 ret + +00000418 <__divsf3>: + 418: 0c d0 rcall .+24 ; 0x432 <__divsf3x> + 41a: e6 c0 rjmp .+460 ; 0x5e8 <__fp_round> + 41c: de d0 rcall .+444 ; 0x5da <__fp_pscB> + 41e: 40 f0 brcs .+16 ; 0x430 <__divsf3+0x18> + 420: d5 d0 rcall .+426 ; 0x5cc <__fp_pscA> + 422: 30 f0 brcs .+12 ; 0x430 <__divsf3+0x18> + 424: 21 f4 brne .+8 ; 0x42e <__divsf3+0x16> + 426: 5f 3f cpi r21, 0xFF ; 255 + 428: 19 f0 breq .+6 ; 0x430 <__divsf3+0x18> + 42a: c7 c0 rjmp .+398 ; 0x5ba <__fp_inf> + 42c: 51 11 cpse r21, r1 + 42e: 10 c1 rjmp .+544 ; 0x650 <__fp_szero> + 430: ca c0 rjmp .+404 ; 0x5c6 <__fp_nan> + +00000432 <__divsf3x>: + 432: eb d0 rcall .+470 ; 0x60a <__fp_split3> + 434: 98 f3 brcs .-26 ; 0x41c <__divsf3+0x4> + +00000436 <__divsf3_pse>: + 436: 99 23 and r25, r25 + 438: c9 f3 breq .-14 ; 0x42c <__divsf3+0x14> + 43a: 55 23 and r21, r21 + 43c: b1 f3 breq .-20 ; 0x42a <__divsf3+0x12> + 43e: 95 1b sub r25, r21 + 440: 55 0b sbc r21, r21 + 442: bb 27 eor r27, r27 + 444: aa 27 eor r26, r26 + 446: 62 17 cp r22, r18 + 448: 73 07 cpc r23, r19 + 44a: 84 07 cpc r24, r20 + 44c: 38 f0 brcs .+14 ; 0x45c <__divsf3_pse+0x26> + 44e: 9f 5f subi r25, 0xFF ; 255 + 450: 5f 4f sbci r21, 0xFF ; 255 + 452: 22 0f add r18, r18 + 454: 33 1f adc r19, r19 + 456: 44 1f adc r20, r20 + 458: aa 1f adc r26, r26 + 45a: a9 f3 breq .-22 ; 0x446 <__divsf3_pse+0x10> + 45c: 33 d0 rcall .+102 ; 0x4c4 <__divsf3_pse+0x8e> + 45e: 0e 2e mov r0, r30 + 460: 3a f0 brmi .+14 ; 0x470 <__divsf3_pse+0x3a> + 462: e0 e8 ldi r30, 0x80 ; 128 + 464: 30 d0 rcall .+96 ; 0x4c6 <__divsf3_pse+0x90> + 466: 91 50 subi r25, 0x01 ; 1 + 468: 50 40 sbci r21, 0x00 ; 0 + 46a: e6 95 lsr r30 + 46c: 00 1c adc r0, r0 + 46e: ca f7 brpl .-14 ; 0x462 <__divsf3_pse+0x2c> + 470: 29 d0 rcall .+82 ; 0x4c4 <__divsf3_pse+0x8e> + 472: fe 2f mov r31, r30 + 474: 27 d0 rcall .+78 ; 0x4c4 <__divsf3_pse+0x8e> + 476: 66 0f add r22, r22 + 478: 77 1f adc r23, r23 + 47a: 88 1f adc r24, r24 + 47c: bb 1f adc r27, r27 + 47e: 26 17 cp r18, r22 + 480: 37 07 cpc r19, r23 + 482: 48 07 cpc r20, r24 + 484: ab 07 cpc r26, r27 + 486: b0 e8 ldi r27, 0x80 ; 128 + 488: 09 f0 breq .+2 ; 0x48c <__divsf3_pse+0x56> + 48a: bb 0b sbc r27, r27 + 48c: 80 2d mov r24, r0 + 48e: bf 01 movw r22, r30 + 490: ff 27 eor r31, r31 + 492: 93 58 subi r25, 0x83 ; 131 + 494: 5f 4f sbci r21, 0xFF ; 255 + 496: 2a f0 brmi .+10 ; 0x4a2 <__divsf3_pse+0x6c> + 498: 9e 3f cpi r25, 0xFE ; 254 + 49a: 51 05 cpc r21, r1 + 49c: 68 f0 brcs .+26 ; 0x4b8 <__divsf3_pse+0x82> + 49e: 8d c0 rjmp .+282 ; 0x5ba <__fp_inf> + 4a0: d7 c0 rjmp .+430 ; 0x650 <__fp_szero> + 4a2: 5f 3f cpi r21, 0xFF ; 255 + 4a4: ec f3 brlt .-6 ; 0x4a0 <__divsf3_pse+0x6a> + 4a6: 98 3e cpi r25, 0xE8 ; 232 + 4a8: dc f3 brlt .-10 ; 0x4a0 <__divsf3_pse+0x6a> + 4aa: 86 95 lsr r24 + 4ac: 77 95 ror r23 + 4ae: 67 95 ror r22 + 4b0: b7 95 ror r27 + 4b2: f7 95 ror r31 + 4b4: 9f 5f subi r25, 0xFF ; 255 + 4b6: c9 f7 brne .-14 ; 0x4aa <__divsf3_pse+0x74> + 4b8: 88 0f add r24, r24 + 4ba: 91 1d adc r25, r1 + 4bc: 96 95 lsr r25 + 4be: 87 95 ror r24 + 4c0: 97 f9 bld r25, 7 + 4c2: 08 95 ret + 4c4: e1 e0 ldi r30, 0x01 ; 1 + 4c6: 66 0f add r22, r22 + 4c8: 77 1f adc r23, r23 + 4ca: 88 1f adc r24, r24 + 4cc: bb 1f adc r27, r27 + 4ce: 62 17 cp r22, r18 + 4d0: 73 07 cpc r23, r19 + 4d2: 84 07 cpc r24, r20 + 4d4: ba 07 cpc r27, r26 + 4d6: 20 f0 brcs .+8 ; 0x4e0 <__divsf3_pse+0xaa> + 4d8: 62 1b sub r22, r18 + 4da: 73 0b sbc r23, r19 + 4dc: 84 0b sbc r24, r20 + 4de: ba 0b sbc r27, r26 + 4e0: ee 1f adc r30, r30 + 4e2: 88 f7 brcc .-30 ; 0x4c6 <__divsf3_pse+0x90> + 4e4: e0 95 com r30 + 4e6: 08 95 ret + +000004e8 <__fixunssfsi>: + 4e8: 98 d0 rcall .+304 ; 0x61a <__fp_splitA> + 4ea: 88 f0 brcs .+34 ; 0x50e <__fixunssfsi+0x26> + 4ec: 9f 57 subi r25, 0x7F ; 127 + 4ee: 90 f0 brcs .+36 ; 0x514 <__fixunssfsi+0x2c> + 4f0: b9 2f mov r27, r25 + 4f2: 99 27 eor r25, r25 + 4f4: b7 51 subi r27, 0x17 ; 23 + 4f6: a0 f0 brcs .+40 ; 0x520 <__fixunssfsi+0x38> + 4f8: d1 f0 breq .+52 ; 0x52e <__fixunssfsi+0x46> + 4fa: 66 0f add r22, r22 + 4fc: 77 1f adc r23, r23 + 4fe: 88 1f adc r24, r24 + 500: 99 1f adc r25, r25 + 502: 1a f0 brmi .+6 ; 0x50a <__fixunssfsi+0x22> + 504: ba 95 dec r27 + 506: c9 f7 brne .-14 ; 0x4fa <__fixunssfsi+0x12> + 508: 12 c0 rjmp .+36 ; 0x52e <__fixunssfsi+0x46> + 50a: b1 30 cpi r27, 0x01 ; 1 + 50c: 81 f0 breq .+32 ; 0x52e <__fixunssfsi+0x46> + 50e: 9f d0 rcall .+318 ; 0x64e <__fp_zero> + 510: b1 e0 ldi r27, 0x01 ; 1 + 512: 08 95 ret + 514: 9c c0 rjmp .+312 ; 0x64e <__fp_zero> + 516: 67 2f mov r22, r23 + 518: 78 2f mov r23, r24 + 51a: 88 27 eor r24, r24 + 51c: b8 5f subi r27, 0xF8 ; 248 + 51e: 39 f0 breq .+14 ; 0x52e <__fixunssfsi+0x46> + 520: b9 3f cpi r27, 0xF9 ; 249 + 522: cc f3 brlt .-14 ; 0x516 <__fixunssfsi+0x2e> + 524: 86 95 lsr r24 + 526: 77 95 ror r23 + 528: 67 95 ror r22 + 52a: b3 95 inc r27 + 52c: d9 f7 brne .-10 ; 0x524 <__fixunssfsi+0x3c> + 52e: 3e f4 brtc .+14 ; 0x53e <__fixunssfsi+0x56> + 530: 90 95 com r25 + 532: 80 95 com r24 + 534: 70 95 com r23 + 536: 61 95 neg r22 + 538: 7f 4f sbci r23, 0xFF ; 255 + 53a: 8f 4f sbci r24, 0xFF ; 255 + 53c: 9f 4f sbci r25, 0xFF ; 255 + 53e: 08 95 ret + +00000540 <__floatunsisf>: + 540: e8 94 clt + 542: 09 c0 rjmp .+18 ; 0x556 <__floatsisf+0x12> + +00000544 <__floatsisf>: + 544: 97 fb bst r25, 7 + 546: 3e f4 brtc .+14 ; 0x556 <__floatsisf+0x12> + 548: 90 95 com r25 + 54a: 80 95 com r24 + 54c: 70 95 com r23 + 54e: 61 95 neg r22 + 550: 7f 4f sbci r23, 0xFF ; 255 + 552: 8f 4f sbci r24, 0xFF ; 255 + 554: 9f 4f sbci r25, 0xFF ; 255 + 556: 99 23 and r25, r25 + 558: a9 f0 breq .+42 ; 0x584 <__floatsisf+0x40> + 55a: f9 2f mov r31, r25 + 55c: 96 e9 ldi r25, 0x96 ; 150 + 55e: bb 27 eor r27, r27 + 560: 93 95 inc r25 + 562: f6 95 lsr r31 + 564: 87 95 ror r24 + 566: 77 95 ror r23 + 568: 67 95 ror r22 + 56a: b7 95 ror r27 + 56c: f1 11 cpse r31, r1 + 56e: f8 cf rjmp .-16 ; 0x560 <__floatsisf+0x1c> + 570: fa f4 brpl .+62 ; 0x5b0 <__floatsisf+0x6c> + 572: bb 0f add r27, r27 + 574: 11 f4 brne .+4 ; 0x57a <__floatsisf+0x36> + 576: 60 ff sbrs r22, 0 + 578: 1b c0 rjmp .+54 ; 0x5b0 <__floatsisf+0x6c> + 57a: 6f 5f subi r22, 0xFF ; 255 + 57c: 7f 4f sbci r23, 0xFF ; 255 + 57e: 8f 4f sbci r24, 0xFF ; 255 + 580: 9f 4f sbci r25, 0xFF ; 255 + 582: 16 c0 rjmp .+44 ; 0x5b0 <__floatsisf+0x6c> + 584: 88 23 and r24, r24 + 586: 11 f0 breq .+4 ; 0x58c <__floatsisf+0x48> + 588: 96 e9 ldi r25, 0x96 ; 150 + 58a: 11 c0 rjmp .+34 ; 0x5ae <__floatsisf+0x6a> + 58c: 77 23 and r23, r23 + 58e: 21 f0 breq .+8 ; 0x598 <__floatsisf+0x54> + 590: 9e e8 ldi r25, 0x8E ; 142 + 592: 87 2f mov r24, r23 + 594: 76 2f mov r23, r22 + 596: 05 c0 rjmp .+10 ; 0x5a2 <__floatsisf+0x5e> + 598: 66 23 and r22, r22 + 59a: 71 f0 breq .+28 ; 0x5b8 <__floatsisf+0x74> + 59c: 96 e8 ldi r25, 0x86 ; 134 + 59e: 86 2f mov r24, r22 + 5a0: 70 e0 ldi r23, 0x00 ; 0 + 5a2: 60 e0 ldi r22, 0x00 ; 0 + 5a4: 2a f0 brmi .+10 ; 0x5b0 <__floatsisf+0x6c> + 5a6: 9a 95 dec r25 + 5a8: 66 0f add r22, r22 + 5aa: 77 1f adc r23, r23 + 5ac: 88 1f adc r24, r24 + 5ae: da f7 brpl .-10 ; 0x5a6 <__floatsisf+0x62> + 5b0: 88 0f add r24, r24 + 5b2: 96 95 lsr r25 + 5b4: 87 95 ror r24 + 5b6: 97 f9 bld r25, 7 + 5b8: 08 95 ret + +000005ba <__fp_inf>: + 5ba: 97 f9 bld r25, 7 + 5bc: 9f 67 ori r25, 0x7F ; 127 + 5be: 80 e8 ldi r24, 0x80 ; 128 + 5c0: 70 e0 ldi r23, 0x00 ; 0 + 5c2: 60 e0 ldi r22, 0x00 ; 0 + 5c4: 08 95 ret + +000005c6 <__fp_nan>: + 5c6: 9f ef ldi r25, 0xFF ; 255 + 5c8: 80 ec ldi r24, 0xC0 ; 192 + 5ca: 08 95 ret + +000005cc <__fp_pscA>: + 5cc: 00 24 eor r0, r0 + 5ce: 0a 94 dec r0 + 5d0: 16 16 cp r1, r22 + 5d2: 17 06 cpc r1, r23 + 5d4: 18 06 cpc r1, r24 + 5d6: 09 06 cpc r0, r25 + 5d8: 08 95 ret + +000005da <__fp_pscB>: + 5da: 00 24 eor r0, r0 + 5dc: 0a 94 dec r0 + 5de: 12 16 cp r1, r18 + 5e0: 13 06 cpc r1, r19 + 5e2: 14 06 cpc r1, r20 + 5e4: 05 06 cpc r0, r21 + 5e6: 08 95 ret + +000005e8 <__fp_round>: + 5e8: 09 2e mov r0, r25 + 5ea: 03 94 inc r0 + 5ec: 00 0c add r0, r0 + 5ee: 11 f4 brne .+4 ; 0x5f4 <__fp_round+0xc> + 5f0: 88 23 and r24, r24 + 5f2: 52 f0 brmi .+20 ; 0x608 <__fp_round+0x20> + 5f4: bb 0f add r27, r27 + 5f6: 40 f4 brcc .+16 ; 0x608 <__fp_round+0x20> + 5f8: bf 2b or r27, r31 + 5fa: 11 f4 brne .+4 ; 0x600 <__fp_round+0x18> + 5fc: 60 ff sbrs r22, 0 + 5fe: 04 c0 rjmp .+8 ; 0x608 <__fp_round+0x20> + 600: 6f 5f subi r22, 0xFF ; 255 + 602: 7f 4f sbci r23, 0xFF ; 255 + 604: 8f 4f sbci r24, 0xFF ; 255 + 606: 9f 4f sbci r25, 0xFF ; 255 + 608: 08 95 ret + +0000060a <__fp_split3>: + 60a: 57 fd sbrc r21, 7 + 60c: 90 58 subi r25, 0x80 ; 128 + 60e: 44 0f add r20, r20 + 610: 55 1f adc r21, r21 + 612: 59 f0 breq .+22 ; 0x62a <__fp_splitA+0x10> + 614: 5f 3f cpi r21, 0xFF ; 255 + 616: 71 f0 breq .+28 ; 0x634 <__fp_splitA+0x1a> + 618: 47 95 ror r20 + +0000061a <__fp_splitA>: + 61a: 88 0f add r24, r24 + 61c: 97 fb bst r25, 7 + 61e: 99 1f adc r25, r25 + 620: 61 f0 breq .+24 ; 0x63a <__fp_splitA+0x20> + 622: 9f 3f cpi r25, 0xFF ; 255 + 624: 79 f0 breq .+30 ; 0x644 <__fp_splitA+0x2a> + 626: 87 95 ror r24 + 628: 08 95 ret + 62a: 12 16 cp r1, r18 + 62c: 13 06 cpc r1, r19 + 62e: 14 06 cpc r1, r20 + 630: 55 1f adc r21, r21 + 632: f2 cf rjmp .-28 ; 0x618 <__fp_split3+0xe> + 634: 46 95 lsr r20 + 636: f1 df rcall .-30 ; 0x61a <__fp_splitA> + 638: 08 c0 rjmp .+16 ; 0x64a <__fp_splitA+0x30> + 63a: 16 16 cp r1, r22 + 63c: 17 06 cpc r1, r23 + 63e: 18 06 cpc r1, r24 + 640: 99 1f adc r25, r25 + 642: f1 cf rjmp .-30 ; 0x626 <__fp_splitA+0xc> + 644: 86 95 lsr r24 + 646: 71 05 cpc r23, r1 + 648: 61 05 cpc r22, r1 + 64a: 08 94 sec + 64c: 08 95 ret + +0000064e <__fp_zero>: + 64e: e8 94 clt + +00000650 <__fp_szero>: + 650: bb 27 eor r27, r27 + 652: 66 27 eor r22, r22 + 654: 77 27 eor r23, r23 + 656: cb 01 movw r24, r22 + 658: 97 f9 bld r25, 7 + 65a: 08 95 ret + +0000065c <__mulsf3>: + 65c: 0a d0 rcall .+20 ; 0x672 <__mulsf3x> + 65e: c4 cf rjmp .-120 ; 0x5e8 <__fp_round> + 660: b5 df rcall .-150 ; 0x5cc <__fp_pscA> + 662: 28 f0 brcs .+10 ; 0x66e <__mulsf3+0x12> + 664: ba df rcall .-140 ; 0x5da <__fp_pscB> + 666: 18 f0 brcs .+6 ; 0x66e <__mulsf3+0x12> + 668: 95 23 and r25, r21 + 66a: 09 f0 breq .+2 ; 0x66e <__mulsf3+0x12> + 66c: a6 cf rjmp .-180 ; 0x5ba <__fp_inf> + 66e: ab cf rjmp .-170 ; 0x5c6 <__fp_nan> + 670: ef cf rjmp .-34 ; 0x650 <__fp_szero> + +00000672 <__mulsf3x>: + 672: cb df rcall .-106 ; 0x60a <__fp_split3> + 674: a8 f3 brcs .-22 ; 0x660 <__mulsf3+0x4> + +00000676 <__mulsf3_pse>: + 676: 99 23 and r25, r25 + 678: d9 f3 breq .-10 ; 0x670 <__mulsf3+0x14> + 67a: 55 23 and r21, r21 + 67c: c9 f3 breq .-14 ; 0x670 <__mulsf3+0x14> + 67e: 95 0f add r25, r21 + 680: 50 e0 ldi r21, 0x00 ; 0 + 682: 55 1f adc r21, r21 + 684: aa 27 eor r26, r26 + 686: ee 27 eor r30, r30 + 688: ff 27 eor r31, r31 + 68a: bb 27 eor r27, r27 + 68c: 00 24 eor r0, r0 + 68e: 08 94 sec + 690: 67 95 ror r22 + 692: 20 f4 brcc .+8 ; 0x69c <__mulsf3_pse+0x26> + 694: e2 0f add r30, r18 + 696: f3 1f adc r31, r19 + 698: b4 1f adc r27, r20 + 69a: 0a 1e adc r0, r26 + 69c: 22 0f add r18, r18 + 69e: 33 1f adc r19, r19 + 6a0: 44 1f adc r20, r20 + 6a2: aa 1f adc r26, r26 + 6a4: 66 95 lsr r22 + 6a6: a9 f7 brne .-22 ; 0x692 <__mulsf3_pse+0x1c> + 6a8: 77 95 ror r23 + 6aa: 30 f4 brcc .+12 ; 0x6b8 <__mulsf3_pse+0x42> + 6ac: f3 0f add r31, r19 + 6ae: b4 1f adc r27, r20 + 6b0: 0a 1e adc r0, r26 + 6b2: 12 1e adc r1, r18 + 6b4: 08 f4 brcc .+2 ; 0x6b8 <__mulsf3_pse+0x42> + 6b6: 63 95 inc r22 + 6b8: 33 0f add r19, r19 + 6ba: 44 1f adc r20, r20 + 6bc: aa 1f adc r26, r26 + 6be: 22 1f adc r18, r18 + 6c0: 76 95 lsr r23 + 6c2: 99 f7 brne .-26 ; 0x6aa <__mulsf3_pse+0x34> + 6c4: 87 95 ror r24 + 6c6: 20 f4 brcc .+8 ; 0x6d0 <__mulsf3_pse+0x5a> + 6c8: b4 0f add r27, r20 + 6ca: 0a 1e adc r0, r26 + 6cc: 12 1e adc r1, r18 + 6ce: 63 1f adc r22, r19 + 6d0: 44 0f add r20, r20 + 6d2: aa 1f adc r26, r26 + 6d4: 22 1f adc r18, r18 + 6d6: 33 1f adc r19, r19 + 6d8: 86 95 lsr r24 + 6da: a9 f7 brne .-22 ; 0x6c6 <__mulsf3_pse+0x50> + 6dc: 86 2f mov r24, r22 + 6de: 71 2d mov r23, r1 + 6e0: 60 2d mov r22, r0 + 6e2: 11 24 eor r1, r1 + 6e4: 9f 57 subi r25, 0x7F ; 127 + 6e6: 50 40 sbci r21, 0x00 ; 0 + 6e8: 8a f0 brmi .+34 ; 0x70c <__mulsf3_pse+0x96> + 6ea: e1 f0 breq .+56 ; 0x724 <__mulsf3_pse+0xae> + 6ec: 88 23 and r24, r24 + 6ee: 4a f0 brmi .+18 ; 0x702 <__mulsf3_pse+0x8c> + 6f0: ee 0f add r30, r30 + 6f2: ff 1f adc r31, r31 + 6f4: bb 1f adc r27, r27 + 6f6: 66 1f adc r22, r22 + 6f8: 77 1f adc r23, r23 + 6fa: 88 1f adc r24, r24 + 6fc: 91 50 subi r25, 0x01 ; 1 + 6fe: 50 40 sbci r21, 0x00 ; 0 + 700: a9 f7 brne .-22 ; 0x6ec <__mulsf3_pse+0x76> + 702: 9e 3f cpi r25, 0xFE ; 254 + 704: 51 05 cpc r21, r1 + 706: 70 f0 brcs .+28 ; 0x724 <__mulsf3_pse+0xae> + 708: 58 cf rjmp .-336 ; 0x5ba <__fp_inf> + 70a: a2 cf rjmp .-188 ; 0x650 <__fp_szero> + 70c: 5f 3f cpi r21, 0xFF ; 255 + 70e: ec f3 brlt .-6 ; 0x70a <__mulsf3_pse+0x94> + 710: 98 3e cpi r25, 0xE8 ; 232 + 712: dc f3 brlt .-10 ; 0x70a <__mulsf3_pse+0x94> + 714: 86 95 lsr r24 + 716: 77 95 ror r23 + 718: 67 95 ror r22 + 71a: b7 95 ror r27 + 71c: f7 95 ror r31 + 71e: e7 95 ror r30 + 720: 9f 5f subi r25, 0xFF ; 255 + 722: c1 f7 brne .-16 ; 0x714 <__mulsf3_pse+0x9e> + 724: fe 2b or r31, r30 + 726: 88 0f add r24, r24 + 728: 91 1d adc r25, r1 + 72a: 96 95 lsr r25 + 72c: 87 95 ror r24 + 72e: 97 f9 bld r25, 7 + 730: 08 95 ret + +00000732 <_exit>: + 732: f8 94 cli + +00000734 <__stop_program>: + 734: ff cf rjmp .-2 ; 0x734 <__stop_program> diff --git a/firmware/Release/dynamit.map b/firmware/Release/dynamit.map new file mode 100644 index 0000000..cbea39f --- /dev/null +++ b/firmware/Release/dynamit.map @@ -0,0 +1,597 @@ +Archive member included to satisfy reference by file (symbol) + +c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3.o) + main.o (__subsf3) +c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o) + c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3.o) (__addsf3x) +c:/program files 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(x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr25/tiny-stack\libgcc.a(_exit.o) + 0x00000732 _exit + 0x00000732 exit + *(.fini9) + *(.fini8) + *(.fini8) + *(.fini7) + *(.fini7) + *(.fini6) + *(.fini6) + *(.fini5) + *(.fini5) + *(.fini4) + *(.fini4) + *(.fini3) + *(.fini3) + *(.fini2) + *(.fini2) + *(.fini1) + *(.fini1) + *(.fini0) + .fini0 0x00000732 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr25/tiny-stack\libgcc.a(_exit.o) + *(.fini0) + 0x00000736 _etext = . + +.data 0x00800060 0x18 load address 0x00000736 + 0x00800060 PROVIDE (__data_start, .) + *(.data) + *(.data*) + .data.ten_sec 0x00800060 0x1 main.o + 0x00800060 ten_sec + .data.numbers_msb + 0x00800061 0x16 main.o + 0x00800061 numbers_msb + *(.gnu.linkonce.d*) + *(.rodata) + *(.rodata*) + *(.gnu.linkonce.r*) + 0x00800078 . = ALIGN (0x2) + *fill* 0x00800077 0x1 + 0x00800078 _edata = . + 0x00800078 PROVIDE (__data_end, .) + +.bss 0x00800078 0x3 + 0x00800078 PROVIDE (__bss_start, .) + *(.bss) + *(.bss*) + .bss.boom 0x00800078 0x1 main.o + 0x00800078 boom + .bss.sec_ten 0x00800079 0x1 main.o + 0x00800079 sec_ten + .bss.sec 0x0080007a 0x1 main.o + 0x0080007a sec + *(COMMON) + 0x0080007b PROVIDE (__bss_end, .) + 0x00000736 __data_load_start = LOADADDR (.data) + 0x0000074e __data_load_end = (__data_load_start + SIZEOF (.data)) + +.noinit 0x0080007b 0x0 + [!provide] PROVIDE (__noinit_start, .) + *(.noinit*) + [!provide] PROVIDE (__noinit_end, .) + 0x0080007b _end = . + [!provide] PROVIDE (__heap_start, .) + +.eeprom 0x00810000 0x0 + *(.eeprom*) + 0x00810000 __eeprom_end = . + +.fuse + *(.fuse) + *(.lfuse) + *(.hfuse) + *(.efuse) + +.lock + *(.lock*) + +.signature + *(.signature*) + +.user_signatures + *(.user_signatures*) + +.stab + *(.stab) + +.stabstr + *(.stabstr) + +.stab.excl + *(.stab.excl) + +.stab.exclstr + *(.stab.exclstr) + +.stab.index + *(.stab.index) + +.stab.indexstr + *(.stab.indexstr) + +.comment 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0x00000000 0x101 + *(.debug_line .debug_line.* .debug_line_end) + .debug_line 0x00000000 0x101 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny2313/avr25/tiny-stack/crtattiny2313.o + +.debug_frame + *(.debug_frame) + +.debug_str 0x00000000 0x163 + *(.debug_str) + .debug_str 0x00000000 0x163 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny2313/avr25/tiny-stack/crtattiny2313.o + +.debug_loc + *(.debug_loc) + +.debug_macinfo + *(.debug_macinfo) + +.debug_weaknames + *(.debug_weaknames) + +.debug_funcnames + *(.debug_funcnames) + +.debug_typenames + *(.debug_typenames) + +.debug_varnames + *(.debug_varnames) + +.debug_pubtypes + *(.debug_pubtypes) + +.debug_ranges + *(.debug_ranges) + +.debug_macro + *(.debug_macro) +OUTPUT(dynamit.elf elf32-avr) +LOAD linker stubs diff --git a/firmware/Release/dynamit.srec b/firmware/Release/dynamit.srec new file mode 100644 index 0000000..6e523e5 --- /dev/null +++ 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(x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \ + C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include/avr/iotn2313.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h \ + c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h: + +C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include/avr/iotn2313.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h: + +c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h: diff --git a/firmware/Release/main.o b/firmware/Release/main.o new file mode 100644 index 0000000..31f840c Binary files /dev/null and b/firmware/Release/main.o differ diff --git a/firmware/Release/makedep.mk b/firmware/Release/makedep.mk new file mode 100644 index 0000000..2925510 --- /dev/null +++ b/firmware/Release/makedep.mk @@ -0,0 +1,6 @@ +################################################################################ +# Automatically-generated file. Do not edit or delete the file +################################################################################ + +main.c + diff --git a/firmware/dynamit.atsln b/firmware/dynamit.atsln new file mode 100644 index 0000000..30e5f00 --- /dev/null +++ b/firmware/dynamit.atsln @@ -0,0 +1,22 @@ + +Microsoft Visual Studio Solution File, Format Version 12.00 +# Atmel Studio Solution File, Format Version 11.00 +VisualStudioVersion = 14.0.23107.0 +MinimumVisualStudioVersion = 10.0.40219.1 +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "dynamit", "dynamit.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|AVR = Debug|AVR + Release|AVR = Release|AVR + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|AVR.ActiveCfg = Debug|AVR + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|AVR.Build.0 = Debug|AVR + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.ActiveCfg = Release|AVR + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.Build.0 = Release|AVR + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/firmware/dynamit.componentinfo.xml b/firmware/dynamit.componentinfo.xml new file mode 100644 index 0000000..9aa8445 --- /dev/null +++ b/firmware/dynamit.componentinfo.xml @@ -0,0 +1,86 @@ + + + + + + + Device + Startup + + + Atmel + 1.10.0 + C:/Program Files (x86)\Atmel\Studio\7.0\Packs + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include\ + + include + C + + + include/ + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include\avr\iotn2313.h + + header + C + mgg2G9+qzT+VIuUFWhCuSQ== + + include/avr/iotn2313.h + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\templates\main.c + template + source + C Exe + KjvOcFWd++tbnsEMfVPd/w== + + templates/main.c + Main file (.c) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\templates\main.cpp + template + source + C Exe + mkKaE95TOoATsuBGv6jmxg== + + templates/main.cpp + Main file (.cpp) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313 + + libraryPrefix + GCC + + + gcc/dev/attiny2313 + + + + + ATtiny_DFP + C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/Atmel.ATtiny_DFP.pdsc + 1.10.348 + true + ATtiny2313 + + + + Resolved + Fixed + true + + + \ No newline at end of file diff --git a/firmware/dynamit.cproj b/firmware/dynamit.cproj new file mode 100644 index 0000000..9d2d590 --- /dev/null +++ b/firmware/dynamit.cproj @@ -0,0 +1,155 @@ + + + + 2.0 + 7.0 + com.Atmel.AVRGCC8.C + dce6c7e3-ee26-4d79-826b-08594b9ad897 + ATtiny2313 + none + Executable + C + $(MSBuildProjectName) + .elf + $(MSBuildProjectDirectory)\$(Configuration) + dynamit + dynamit + dynamit + Native + true + false + true + true + 0x20000000 + + false + exception_table + 2 + 0 + 1 + + + + + + + + + + + + + + com.atmel.avrdbg.tool.jtagice3plus + J30200019319 + 0x1E910A + + + + 125000 + + debugWIRE + + com.atmel.avrdbg.tool.jtagice3plus + J30200019319 + JTAGICE3 + + debugWIRE + 125000 + + + + + debugWIRE + + com.atmel.avrdbg.tool.simulator + + + Simulator + + + + + + -mmcu=attiny2313 -B "%24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313" + True + True + True + True + False + True + True + + + NDEBUG + + + + + %24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\include\ + + + Optimize for size (-Os) + True + True + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\include\ + + + + + + + + + -mmcu=attiny2313 -B "%24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313" + True + True + True + True + False + True + True + + + DEBUG + + + + + %24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\include\ + + + Optimize debugging experience (-Og) + True + True + Default (-g2) + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\include\ + + + Default (-Wa,-g) + + + + + + compile + + + + \ No newline at end of file diff --git a/firmware/main.c b/firmware/main.c new file mode 100644 index 0000000..40702e9 --- /dev/null +++ b/firmware/main.c @@ -0,0 +1,243 @@ +/* + * dynamit.c + * + * Created: 3/4/2024 3:07:17 PM + * Author : forss + */ + +#define F_CPU 1000000UL + +#include +#include +#include + +/************************************************************************/ +/* +Vcc will vary between 2-3 Volt, system frequency can not exceed 4MHz. +Default setting of ~1MHz is fine. +*/ +/************************************************************************/ + +#define TIMER_INTERVAL_MS 100 +#define BEEP_LENGTH_MS 100 + +typedef enum { + LEFT = 0b01111111, + MIDDLE = 0b10111111, + RIGHT = 0b11011111 +} digit_msb; + +typedef enum { + DP_ON = 0b11110111, + DP_OFF = 0b11111111 +} decimal_point_msb; + +// Last num is display off +#define DISPLAY_OFF 10 +uint16_t numbers_msb[11] = {0xe3e9, 0xefef, 0xebd9, 0xebcb, 0xe7cf, 0xf3cb, 0xf3c9, 0xebef, 0xe3c9, 0xe3cb, 0xffff}; + +volatile uint8_t ten_sec = 6; +volatile uint8_t sec = 0; +volatile uint8_t sec_ten = 0; +volatile uint8_t boom = 0; + +volatile + +void shift_out_msb(uint8_t); +void display_num_msb(uint16_t, digit_msb, decimal_point_msb); + +void set_beep_freq(uint16_t); +void turn_off_beep(); + +int main(void) +{ + cli(); + + // Set up timer0 as clock, no pin output, interrupt, CTC + TCCR0A |= (1 << WGM01); + TIMSK |= (1 << OCIE0A); + OCR0A = F_CPU / 1024 / TIMER_INTERVAL_MS * 10; + + // Set up timer1 as beeper, no pin output, interrupt, OCR1A is top, OCR1B is compare, PWM phase correct + TCCR1A |= (1 << WGM11) | (1 << WGM10); + TCCR1B |= (1 << WGM13); + TIMSK |= (1 << OCIE1B); + + // Pin outputs + DDRD = (1 << PIND4) | (1 << PIND3) | (1 << PIND2); + DDRB = (1 << PINB4); + + PORTD = 0x00; + sei(); + + // Idle until button 1 is pressed, continously display starttime + while (PINB & 2) + { + + display_num_msb(sec, MIDDLE, DP_ON); + display_num_msb(ten_sec, LEFT, DP_OFF); + display_num_msb(sec_ten, RIGHT, DP_OFF); + } + + // Start timer0 with prescaler of 1024 + TCCR0B |= (1 << CS02) | (0 << CS01) | (1 << CS00); + + // Start beeping once every 5 seconds + set_beep_freq(200); + + // Start timer1 with prescaler of 64 + TCCR1B |= (0 << CS12) | (1 << CS11) | (1 << CS10); + + // Mainloop + while (1) + { + // Turn of dp if detonated + if (boom) + { + display_num_msb(sec, MIDDLE, DP_OFF); + } + else + { + display_num_msb(sec, MIDDLE, DP_ON); + } + + display_num_msb(ten_sec, LEFT, DP_OFF); + display_num_msb(sec_ten, RIGHT, DP_OFF); + } +} + +ISR (TIMER1_COMPB_vect) +{ + PORTB ^= (1 << PINB4); +} + +ISR (TIMER0_COMPA_vect) { + + // Flash on and off after detonation + if (boom & 1) + { + // Flash off + //PORTB = (1<< PINB4); + ten_sec = DISPLAY_OFF; + sec = DISPLAY_OFF; + sec_ten = DISPLAY_OFF; + + boom = 2; + } + else if (boom & 2) + { + PORTB = (0<< PINB4); + // Flash 0 + ten_sec = 0; + sec = 0; + sec_ten = 0; + + boom = 1; + } + + // Countdown + else + { + // 0.1 to prevent divide by 0 + set_beep_freq(200.0 * 60.0 / ((10.0 * ten_sec) + sec + 0.1)); + + if (ten_sec == 0 && sec == 0 && sec_ten) + { + ten_sec = 0; + sec = 0; + sec_ten = 0; + + // Detonate, slow down timer for flashing + boom = 1; + OCR0A = 98 * 2; + } + else + { + if (sec == 0 && sec_ten == 0) + { + sec = 9; + sec_ten = 9; + ten_sec--; + } + else + { + if (sec_ten == 0) + { + sec_ten = 9; + sec--; + } + else + { + sec_ten--; + } + } + } + } +} + +void shift_out_msb(uint8_t byte) +{ + uint8_t next_bit; + for (uint8_t i = 0; i < 8; i++) + { + next_bit = ((byte >> (7 - i)) & 1); + + if (next_bit) + { + PORTD |= (1 << PIND2); + } + else + { + PORTD &= ~(1 << PIND2); + } + + // Toggle SCLK twice to shift out + PORTD ^= (1 << PIND4); + PORTD ^= (1 << PIND4); + } +} + +void display_num_msb(uint16_t number, digit_msb digit_number, decimal_point_msb dp) +{ + cli(); + shift_out_msb((numbers_msb[number] >> 8) & digit_number); + shift_out_msb((numbers_msb[number] & 0xff) & dp); + + // Toggle RCLK twice to latch + PORTD ^= (1 << PIND3); + PORTD ^= (1 << PIND3); + sei(); +} + +void set_beep_freq(uint16_t freq_mHz) +{ + cli(); + + // Constant sound when frequency gets too high + if (freq_mHz >= 100 * BEEP_LENGTH_MS) { + turn_off_beep(); + // PORTB |= (1 << PINB4); + return; + } + + // Frequency is determined by TOP[OCR1A] + // freq_mHz = (F_CPU * 1000) / ((prescalar + 1) * TOP[OCR1A] * 2) + // Lowest frequency without changing prescalar: 0.12Hz + + OCR1A = (F_CPU * 1000.0) / (65.0 * freq_mHz) / 2.0; + + // ON-time is determined by COMP[OCR1B] + // on_time_ms = 2*(TOP[OCR1A] - COMP[OCR1B]) / (1000 * F_CPU / (prescalar)) + + OCR1B = OCR1A - ((BEEP_LENGTH_MS * (F_CPU / 1000.0)) / (2.0 * 65.0)); + + sei(); +} + +void turn_off_beep() +{ + // Disable clock to timer + TCCR1B &= ~((1 << CS12) | (1 << CS11) | (1 << CS10)); + + PORTB &= ~(0 << PINB4); +} \ No newline at end of file diff --git a/kicad/dynamit-backups/dynamit-2024-02-28_181349.zip b/kicad/dynamit-backups/dynamit-2024-02-28_181349.zip new file mode 100644 index 0000000..f96ff0a Binary files /dev/null and b/kicad/dynamit-backups/dynamit-2024-02-28_181349.zip differ diff --git a/kicad/dynamit-backups/dynamit-2024-02-28_182843.zip b/kicad/dynamit-backups/dynamit-2024-02-28_182843.zip new file mode 100644 index 0000000..34954ec Binary files /dev/null and b/kicad/dynamit-backups/dynamit-2024-02-28_182843.zip differ diff --git a/kicad/dynamit-backups/dynamit-2024-02-28_183503.zip b/kicad/dynamit-backups/dynamit-2024-02-28_183503.zip new file mode 100644 index 0000000..d82f43c Binary files /dev/null and b/kicad/dynamit-backups/dynamit-2024-02-28_183503.zip differ diff --git a/kicad/dynamit-backups/dynamit-2024-02-28_184908.zip b/kicad/dynamit-backups/dynamit-2024-02-28_184908.zip new file mode 100644 index 0000000..a379cdb Binary files /dev/null and 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+1,6099 @@ +(kicad_pcb (version 20221018) (generator pcbnew) + + (general + (thickness 1.6) + ) + + (paper "A4") + (layers + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (50 "User.1" user) + (51 "User.2" user) + (52 "User.3" user) + (53 "User.4" user) + (54 "User.5" user) + (55 "User.6" user) + (56 "User.7" user) + (57 "User.8" user) + (58 "User.9" user) + ) + + (setup + (stackup + (layer "F.SilkS" (type "Top Silk Screen")) + (layer "F.Paste" (type "Top Solder Paste")) + (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) + (layer "F.Cu" (type "copper") (thickness 0.035)) + (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) + (layer "B.Cu" (type "copper") (thickness 0.035)) + (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) + (layer "B.Paste" (type "Bottom Solder Paste")) + (layer "B.SilkS" (type "Bottom Silk Screen")) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (pcbplotparams + (layerselection 0x00010fc_ffffffff) + (plot_on_all_layers_selection 0x0000000_00000000) + (disableapertmacros false) + (usegerberextensions false) + (usegerberattributes true) + (usegerberadvancedattributes true) + (creategerberjobfile true) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + 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