Pushed to git

diff --git a/3d/FLAP.stl b/3d/FLAP.stl
new file mode 100644 (file)
index 0000000..a3b4c8c
Binary files /dev/null and b/3d/FLAP.stl differ

diff --git a/3d/MAIN.stl b/3d/MAIN.stl
new file mode 100644 (file)
index 0000000..394f3a3
Binary files /dev/null and b/3d/MAIN.stl differ

diff --git a/firmware/.vs/dynamit/v14/-Nils-Laptop.atsuo b/firmware/.vs/dynamit/v14/-Nils-Laptop.atsuo
new file mode 100644 (file)
index 0000000..96d4dca
Binary files /dev/null and b/firmware/.vs/dynamit/v14/-Nils-Laptop.atsuo differ

diff --git a/firmware/.vs/dynamit/v14/.atsuo b/firmware/.vs/dynamit/v14/.atsuo
new file mode 100644 (file)
index 0000000..98e551b
Binary files /dev/null and b/firmware/.vs/dynamit/v14/.atsuo differ

diff --git a/firmware/Debug/Makefile b/firmware/Debug/Makefile
new file mode 100644 (file)
index 0000000..4fffc4a
--- /dev/null
+++ b/firmware/Debug/Makefile
@@ -0,0 +1,127 @@
+################################################################################\r
+# Automatically-generated file. Do not edit!\r
+################################################################################\r
+\r
+SHELL := cmd.exe\r
+RM := rm -rf\r
+\r
+USER_OBJS :=\r
+\r
+LIBS := \r
+PROJ := \r
+\r
+O_SRCS := \r
+C_SRCS := \r
+S_SRCS := \r
+S_UPPER_SRCS := \r
+OBJ_SRCS := \r
+ASM_SRCS := \r
+PREPROCESSING_SRCS := \r
+OBJS := \r
+OBJS_AS_ARGS := \r
+C_DEPS := \r
+C_DEPS_AS_ARGS := \r
+EXECUTABLES := \r
+OUTPUT_FILE_PATH :=\r
+OUTPUT_FILE_PATH_AS_ARGS :=\r
+AVR_APP_PATH :=$$$AVR_APP_PATH$$$\r
+QUOTE := "\r
+ADDITIONAL_DEPENDENCIES:=\r
+OUTPUT_FILE_DEP:=\r
+LIB_DEP:=\r
+LINKER_SCRIPT_DEP:=\r
+\r
+# Every subdirectory with source files must be described here\r
+SUBDIRS := \r
+\r
+\r
+# Add inputs and outputs from these tool invocations to the build variables \r
+C_SRCS +=  \\r
+../main.c\r
+\r
+\r
+PREPROCESSING_SRCS += \r
+\r
+\r
+ASM_SRCS += \r
+\r
+\r
+OBJS +=  \\r
+main.o\r
+\r
+OBJS_AS_ARGS +=  \\r
+main.o\r
+\r
+C_DEPS +=  \\r
+main.d\r
+\r
+C_DEPS_AS_ARGS +=  \\r
+main.d\r
+\r
+OUTPUT_FILE_PATH +=dynamit.elf\r
+\r
+OUTPUT_FILE_PATH_AS_ARGS +=dynamit.elf\r
+\r
+ADDITIONAL_DEPENDENCIES:=\r
+\r
+OUTPUT_FILE_DEP:= ./makedep.mk\r
+\r
+LIB_DEP+= \r
+\r
+LINKER_SCRIPT_DEP+= \r
+\r
+\r
+# AVR32/GNU C Compiler\r
+./main.o: .././main.c\r
+       @echo Building file: $<\r
+       @echo Invoking: AVR/GNU C Compiler : 5.4.0\r
+       $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE)  -x c -funsigned-char -funsigned-bitfields -DDEBUG  -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include"  -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -g2 -Wall -mmcu=attiny2313 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)"   -o "$@" "$<" \r
+       @echo Finished building: $<\r
+       \r
+\r
+\r
+\r
+\r
+# AVR32/GNU Preprocessing Assembler\r
+\r
+\r
+\r
+# AVR32/GNU Assembler\r
+\r
+\r
+\r
+\r
+ifneq ($(MAKECMDGOALS),clean)\r
+ifneq ($(strip $(C_DEPS)),)\r
+-include $(C_DEPS)\r
+endif\r
+endif\r
+\r
+# Add inputs and outputs from these tool invocations to the build variables \r
+\r
+# All Target\r
+all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES)\r
+\r
+$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP)\r
+       @echo Building target: $@\r
+       @echo Invoking: AVR/GNU Linker : 5.4.0\r
+       $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="dynamit.map" -Wl,--start-group -Wl,-lm  -Wl,--end-group -Wl,--gc-sections -mmcu=attiny2313 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313"  \r
+       @echo Finished building target: $@\r
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures  "dynamit.elf" "dynamit.hex"
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom  --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0  --no-change-warnings -O ihex "dynamit.elf" "dynamit.eep" || exit 0
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "dynamit.elf" > "dynamit.lss"
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "dynamit.elf" "dynamit.srec"
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "dynamit.elf"
+       \r
+       \r
+\r
+\r
+\r
+\r
+\r
+# Other Targets\r
+clean:\r
+       -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES)  \r
+       -$(RM) $(C_DEPS_AS_ARGS)   \r
+       rm -rf "dynamit.elf" "dynamit.a" "dynamit.hex" "dynamit.lss" "dynamit.eep" "dynamit.map" "dynamit.srec" "dynamit.usersignatures"
+       
\ No newline at end of file

diff --git a/firmware/Debug/dynamit.eep b/firmware/Debug/dynamit.eep
new file mode 100644 (file)
index 0000000..1996e8f
--- /dev/null
+++ b/firmware/Debug/dynamit.eep
@@ -0,0 +1 @@
+:00000001FF\r

diff --git a/firmware/Debug/dynamit.elf b/firmware/Debug/dynamit.elf
new file mode 100644 (file)
index 0000000..8fe2707
Binary files /dev/null and b/firmware/Debug/dynamit.elf differ

diff --git a/firmware/Debug/dynamit.hex b/firmware/Debug/dynamit.hex
new file mode 100644 (file)
index 0000000..02527ce
--- /dev/null
+++ b/firmware/Debug/dynamit.hex
@@ -0,0 +1,120 @@
+:1000000012C02AC029C028C027C026C025C024C0CD\r
+:1000100023C022C021C020C020C0F6C01DC01CC00B\r
+:100020001BC01AC019C011241FBECFEDCDBF10E0F8\r
+:10003000A0E6B0E0E4E4F7E002C005900D92A83736\r
+:10004000B107D9F720E0A8E7B0E001C01D92AB37B7\r
+:10005000B207E1F785D074C3D3CF1F920F920FB6CA\r
+:100060000F9211248F939F9398B380E1892788BBC7\r
+:100070009F918F910F900FBE0F901F90189520E0C9\r
+:100080001CC067E070E0621B7109482F50E002C09D\r
+:10009000559547956A95E2F740FF04C092B3946086\r
+:1000A00092BB03C092B39B7F92BB32B390E13927DE\r
+:1000B00032BB32B3932792BB2F5F283010F30895E1\r
+:1000C0001F93CF93DF93142FF894EC01CC0FDD1F17\r
+:1000D000CF59DF4F89818623D2DF88818123CFDF0B\r
+:1000E00092B388E0982792BB92B3892782BB789419\r
+:1000F000DF91CF911F9108958EB5887F8EBD88B313\r
+:1001000088BB0895F894803127E2920710F0F4DF5D\r
+:100110000895BC0180E090E01AD220E030E042E88F\r
+:1001200052E4A3D29B01AC0168E27BE68EE69EE43A\r
+:100130007AD120E030E040E05FE397D2DCD17BBDB4\r
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+:10064000F2CF4695F1DF08C0161617061806991F57\r
+:10065000F1CF86957105610508940895E894BB274C\r
+:1006600066277727CB0197F908950AD0C4CFB5DF65\r
+:1006700028F0BADF18F0952309F0A6CFABCFEFCF63\r
+:10068000CBDFA8F39923D9F35523C9F3950F50E095\r
+:10069000551FAA27EE27FF27BB270024089467953C\r
+:1006A00020F4E20FF31FB41F0A1E220F331F441F52\r
+:1006B000AA1F6695A9F7779530F4F30FB41F0A1EA9\r
+:1006C000121E08F46395330F441FAA1F221F76954C\r
+:1006D00099F7879520F4B40F0A1E121E631F440F6A\r
+:1006E000AA1F221F331F8695A9F7862F712D602D13\r
+:1006F00011249F5750408AF0E1F088234AF0EE0F12\r
+:10070000FF1FBB1F661F771F881F91505040A9F71E\r
+:100710009E3F510570F058CFA2CF5F3FECF3983E5B\r
+:10072000DCF3869577956795B795F795E7959F5F85\r
+:10073000C1F7FE2B880F911D9695879597F908951F\r
+:04074000F894FFCF5B\r
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+:08075400EBC9E3CBE3FFFF005A\r
+:00000001FF\r

diff --git a/firmware/Debug/dynamit.lss b/firmware/Debug/dynamit.lss
new file mode 100644 (file)
index 0000000..f40590b
--- /dev/null
+++ b/firmware/Debug/dynamit.lss
@@ -0,0 +1,1217 @@
+\r
+dynamit.elf:     file format elf32-avr\r
+\r
+Sections:\r
+Idx Name          Size      VMA       LMA       File off  Algn\r
+  0 .text         00000744  00000000  00000000  00000094  2**1\r
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE\r
+  1 .data         00000018  00800060  00000744  000007d8  2**0\r
+                  CONTENTS, ALLOC, LOAD, DATA\r
+  2 .bss          00000003  00800078  00800078  000007f0  2**0\r
+                  ALLOC\r
+  3 .comment      00000030  00000000  00000000  000007f0  2**0\r
+                  CONTENTS, READONLY\r
+  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  00000820  2**2\r
+                  CONTENTS, READONLY\r
+  5 .debug_aranges 00000050  00000000  00000000  00000860  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+  6 .debug_info   0000075e  00000000  00000000  000008b0  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+  7 .debug_abbrev 0000059b  00000000  00000000  0000100e  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+  8 .debug_line   00000416  00000000  00000000  000015a9  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+  9 .debug_frame  00000104  00000000  00000000  000019c0  2**2\r
+                  CONTENTS, READONLY, DEBUGGING\r
+ 10 .debug_str    00000374  00000000  00000000  00001ac4  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+ 11 .debug_loc    00000281  00000000  00000000  00001e38  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+ 12 .debug_ranges 00000040  00000000  00000000  000020b9  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+\r
+Disassembly of section .text:\r
+\r
+00000000 <__vectors>:\r
+   0:  12 c0           rjmp    .+36            ; 0x26 <__ctors_end>\r
+   2:  2a c0           rjmp    .+84            ; 0x58 <__bad_interrupt>\r
+   4:  29 c0           rjmp    .+82            ; 0x58 <__bad_interrupt>\r
+   6:  28 c0           rjmp    .+80            ; 0x58 <__bad_interrupt>\r
+   8:  27 c0           rjmp    .+78            ; 0x58 <__bad_interrupt>\r
+   a:  26 c0           rjmp    .+76            ; 0x58 <__bad_interrupt>\r
+   c:  25 c0           rjmp    .+74            ; 0x58 <__bad_interrupt>\r
+   e:  24 c0           rjmp    .+72            ; 0x58 <__bad_interrupt>\r
+  10:  23 c0           rjmp    .+70            ; 0x58 <__bad_interrupt>\r
+  12:  22 c0           rjmp    .+68            ; 0x58 <__bad_interrupt>\r
+  14:  21 c0           rjmp    .+66            ; 0x58 <__bad_interrupt>\r
+  16:  20 c0           rjmp    .+64            ; 0x58 <__bad_interrupt>\r
+  18:  20 c0           rjmp    .+64            ; 0x5a <__vector_12>\r
+  1a:  f6 c0           rjmp    .+492           ; 0x208 <__vector_13>\r
+  1c:  1d c0           rjmp    .+58            ; 0x58 <__bad_interrupt>\r
+  1e:  1c c0           rjmp    .+56            ; 0x58 <__bad_interrupt>\r
+  20:  1b c0           rjmp    .+54            ; 0x58 <__bad_interrupt>\r
+  22:  1a c0           rjmp    .+52            ; 0x58 <__bad_interrupt>\r
+  24:  19 c0           rjmp    .+50            ; 0x58 <__bad_interrupt>\r
+\r
+00000026 <__ctors_end>:\r
+  26:  11 24           eor     r1, r1\r
+  28:  1f be           out     0x3f, r1        ; 63\r
+  2a:  cf ed           ldi     r28, 0xDF       ; 223\r
+  2c:  cd bf           out     0x3d, r28       ; 61\r
+\r
+0000002e <__do_copy_data>:\r
+  2e:  10 e0           ldi     r17, 0x00       ; 0\r
+  30:  a0 e6           ldi     r26, 0x60       ; 96\r
+  32:  b0 e0           ldi     r27, 0x00       ; 0\r
+  34:  e4 e4           ldi     r30, 0x44       ; 68\r
+  36:  f7 e0           ldi     r31, 0x07       ; 7\r
+  38:  02 c0           rjmp    .+4             ; 0x3e <__SP_L__+0x1>\r
+  3a:  05 90           lpm     r0, Z+\r
+  3c:  0d 92           st      X+, r0\r
+  3e:  a8 37           cpi     r26, 0x78       ; 120\r
+  40:  b1 07           cpc     r27, r17\r
+  42:  d9 f7           brne    .-10            ; 0x3a <__do_copy_data+0xc>\r
+\r
+00000044 <__do_clear_bss>:\r
+  44:  20 e0           ldi     r18, 0x00       ; 0\r
+  46:  a8 e7           ldi     r26, 0x78       ; 120\r
+  48:  b0 e0           ldi     r27, 0x00       ; 0\r
+  4a:  01 c0           rjmp    .+2             ; 0x4e <.do_clear_bss_start>\r
+\r
+0000004c <.do_clear_bss_loop>:\r
+  4c:  1d 92           st      X+, r1\r
+\r
+0000004e <.do_clear_bss_start>:\r
+  4e:  ab 37           cpi     r26, 0x7B       ; 123\r
+  50:  b2 07           cpc     r27, r18\r
+  52:  e1 f7           brne    .-8             ; 0x4c <.do_clear_bss_loop>\r
+  54:  85 d0           rcall   .+266           ; 0x160 <main>\r
+  56:  74 c3           rjmp    .+1768          ; 0x740 <_exit>\r
+\r
+00000058 <__bad_interrupt>:\r
+  58:  d3 cf           rjmp    .-90            ; 0x0 <__vectors>\r
+\r
+0000005a <__vector_12>:\r
+               display_num_msb(sec_ten, RIGHT, DP_OFF);\r
+    }\r
+}\r
+\r
+ISR (TIMER1_COMPB_vect)\r
+{\r
+  5a:  1f 92           push    r1\r
+  5c:  0f 92           push    r0\r
+  5e:  0f b6           in      r0, 0x3f        ; 63\r
+  60:  0f 92           push    r0\r
+  62:  11 24           eor     r1, r1\r
+  64:  8f 93           push    r24\r
+  66:  9f 93           push    r25\r
+       PORTB ^= (1 << PINB4);\r
+  68:  98 b3           in      r25, 0x18       ; 24\r
+  6a:  80 e1           ldi     r24, 0x10       ; 16\r
+  6c:  89 27           eor     r24, r25\r
+  6e:  88 bb           out     0x18, r24       ; 24\r
+}\r
+  70:  9f 91           pop     r25\r
+  72:  8f 91           pop     r24\r
+  74:  0f 90           pop     r0\r
+  76:  0f be           out     0x3f, r0        ; 63\r
+  78:  0f 90           pop     r0\r
+  7a:  1f 90           pop     r1\r
+  7c:  18 95           reti\r
+\r
+0000007e <shift_out_msb>:\r
+}\r
+\r
+void shift_out_msb(uint8_t byte)\r
+{\r
+       uint8_t next_bit;\r
+       for (uint8_t i = 0; i < 8; i++)\r
+  7e:  20 e0           ldi     r18, 0x00       ; 0\r
+  80:  1c c0           rjmp    .+56            ; 0xba <__DATA_REGION_LENGTH__+0x3a>\r
+       {\r
+               next_bit = ((byte >> (7 - i)) & 1);\r
+  82:  67 e0           ldi     r22, 0x07       ; 7\r
+  84:  70 e0           ldi     r23, 0x00       ; 0\r
+  86:  62 1b           sub     r22, r18\r
+  88:  71 09           sbc     r23, r1\r
+  8a:  48 2f           mov     r20, r24\r
+  8c:  50 e0           ldi     r21, 0x00       ; 0\r
+  8e:  02 c0           rjmp    .+4             ; 0x94 <__DATA_REGION_LENGTH__+0x14>\r
+  90:  55 95           asr     r21\r
+  92:  47 95           ror     r20\r
+  94:  6a 95           dec     r22\r
+  96:  e2 f7           brpl    .-8             ; 0x90 <__DATA_REGION_LENGTH__+0x10>\r
+\r
+               if (next_bit)\r
+  98:  40 ff           sbrs    r20, 0\r
+  9a:  04 c0           rjmp    .+8             ; 0xa4 <__DATA_REGION_LENGTH__+0x24>\r
+               {\r
+                       PORTD |= (1 << PIND2);\r
+  9c:  92 b3           in      r25, 0x12       ; 18\r
+  9e:  94 60           ori     r25, 0x04       ; 4\r
+  a0:  92 bb           out     0x12, r25       ; 18\r
+  a2:  03 c0           rjmp    .+6             ; 0xaa <__DATA_REGION_LENGTH__+0x2a>\r
+               }\r
+               else\r
+               {\r
+                       PORTD &= ~(1 << PIND2);\r
+  a4:  92 b3           in      r25, 0x12       ; 18\r
+  a6:  9b 7f           andi    r25, 0xFB       ; 251\r
+  a8:  92 bb           out     0x12, r25       ; 18\r
+               }\r
+               \r
+               // Toggle SCLK twice to shift out\r
+               PORTD ^= (1 << PIND4);\r
+  aa:  32 b3           in      r19, 0x12       ; 18\r
+  ac:  90 e1           ldi     r25, 0x10       ; 16\r
+  ae:  39 27           eor     r19, r25\r
+  b0:  32 bb           out     0x12, r19       ; 18\r
+               PORTD ^= (1 << PIND4);\r
+  b2:  32 b3           in      r19, 0x12       ; 18\r
+  b4:  93 27           eor     r25, r19\r
+  b6:  92 bb           out     0x12, r25       ; 18\r
+}\r
+\r
+void shift_out_msb(uint8_t byte)\r
+{\r
+       uint8_t next_bit;\r
+       for (uint8_t i = 0; i < 8; i++)\r
+  b8:  2f 5f           subi    r18, 0xFF       ; 255\r
+  ba:  28 30           cpi     r18, 0x08       ; 8\r
+  bc:  10 f3           brcs    .-60            ; 0x82 <__DATA_REGION_LENGTH__+0x2>\r
+               \r
+               // Toggle SCLK twice to shift out\r
+               PORTD ^= (1 << PIND4);\r
+               PORTD ^= (1 << PIND4);\r
+       }\r
+}\r
+  be:  08 95           ret\r
+\r
+000000c0 <display_num_msb>:\r
+\r
+void display_num_msb(uint16_t number, digit_msb digit_number, decimal_point_msb dp)\r
+{\r
+  c0:  1f 93           push    r17\r
+  c2:  cf 93           push    r28\r
+  c4:  df 93           push    r29\r
+  c6:  14 2f           mov     r17, r20\r
+       cli();\r
+  c8:  f8 94           cli\r
+       shift_out_msb((numbers_msb[number] >> 8) & digit_number);\r
+  ca:  ec 01           movw    r28, r24\r
+  cc:  cc 0f           add     r28, r28\r
+  ce:  dd 1f           adc     r29, r29\r
+  d0:  cf 59           subi    r28, 0x9F       ; 159\r
+  d2:  df 4f           sbci    r29, 0xFF       ; 255\r
+  d4:  89 81           ldd     r24, Y+1        ; 0x01\r
+  d6:  86 23           and     r24, r22\r
+  d8:  d2 df           rcall   .-92            ; 0x7e <shift_out_msb>\r
+       shift_out_msb((numbers_msb[number] & 0xff) & dp);\r
+  da:  88 81           ld      r24, Y\r
+  dc:  81 23           and     r24, r17\r
+  de:  cf df           rcall   .-98            ; 0x7e <shift_out_msb>\r
+       \r
+       // Toggle RCLK twice to latch\r
+       PORTD ^= (1 << PIND3);\r
+  e0:  92 b3           in      r25, 0x12       ; 18\r
+  e2:  88 e0           ldi     r24, 0x08       ; 8\r
+  e4:  98 27           eor     r25, r24\r
+  e6:  92 bb           out     0x12, r25       ; 18\r
+       PORTD ^= (1 << PIND3);\r
+  e8:  92 b3           in      r25, 0x12       ; 18\r
+  ea:  89 27           eor     r24, r25\r
+  ec:  82 bb           out     0x12, r24       ; 18\r
+       sei();\r
+  ee:  78 94           sei\r
+}\r
+  f0:  df 91           pop     r29\r
+  f2:  cf 91           pop     r28\r
+  f4:  1f 91           pop     r17\r
+  f6:  08 95           ret\r
+\r
+000000f8 <turn_off_beep>:\r
+}\r
+\r
+void turn_off_beep()\r
+{\r
+       // Disable clock to timer\r
+       TCCR1B &= ~((1 << CS12) | (1 << CS11) | (1 << CS10));\r
+  f8:  8e b5           in      r24, 0x2e       ; 46\r
+  fa:  88 7f           andi    r24, 0xF8       ; 248\r
+  fc:  8e bd           out     0x2e, r24       ; 46\r
+       \r
+       PORTB &= ~(0 << PINB4);\r
+  fe:  88 b3           in      r24, 0x18       ; 24\r
+ 100:  88 bb           out     0x18, r24       ; 24\r
+ 102:  08 95           ret\r
+\r
+00000104 <set_beep_freq>:\r
+       sei();\r
+}\r
+\r
+void set_beep_freq(uint16_t freq_mHz)\r
+{\r
+       cli();\r
+ 104:  f8 94           cli\r
+       \r
+       // Constant sound when frequency gets too high\r
+       if (freq_mHz >= 100 * BEEP_LENGTH_MS) {\r
+ 106:  80 31           cpi     r24, 0x10       ; 16\r
+ 108:  27 e2           ldi     r18, 0x27       ; 39\r
+ 10a:  92 07           cpc     r25, r18\r
+ 10c:  10 f0           brcs    .+4             ; 0x112 <set_beep_freq+0xe>\r
+               turn_off_beep();\r
+ 10e:  f4 df           rcall   .-24            ; 0xf8 <turn_off_beep>\r
+               // PORTB |= (1 << PINB4);\r
+               return;\r
+ 110:  08 95           ret\r
+       \r
+       // Frequency is determined by TOP[OCR1A]\r
+       // freq_mHz = (F_CPU * 1000) / ((prescalar + 1) * TOP[OCR1A] * 2)\r
+       // Lowest frequency without changing prescalar: 0.12Hz\r
+       \r
+       OCR1A = (F_CPU * 1000.0) / (65.0 * freq_mHz) / 2.0;\r
+ 112:  bc 01           movw    r22, r24\r
+ 114:  80 e0           ldi     r24, 0x00       ; 0\r
+ 116:  90 e0           ldi     r25, 0x00       ; 0\r
+ 118:  1a d2           rcall   .+1076          ; 0x54e <__floatunsisf>\r
+ 11a:  20 e0           ldi     r18, 0x00       ; 0\r
+ 11c:  30 e0           ldi     r19, 0x00       ; 0\r
+ 11e:  42 e8           ldi     r20, 0x82       ; 130\r
+ 120:  52 e4           ldi     r21, 0x42       ; 66\r
+ 122:  a3 d2           rcall   .+1350          ; 0x66a <__mulsf3>\r
+ 124:  9b 01           movw    r18, r22\r
+ 126:  ac 01           movw    r20, r24\r
+ 128:  68 e2           ldi     r22, 0x28       ; 40\r
+ 12a:  7b e6           ldi     r23, 0x6B       ; 107\r
+ 12c:  8e e6           ldi     r24, 0x6E       ; 110\r
+ 12e:  9e e4           ldi     r25, 0x4E       ; 78\r
+ 130:  7a d1           rcall   .+756           ; 0x426 <__divsf3>\r
+ 132:  20 e0           ldi     r18, 0x00       ; 0\r
+ 134:  30 e0           ldi     r19, 0x00       ; 0\r
+ 136:  40 e0           ldi     r20, 0x00       ; 0\r
+ 138:  5f e3           ldi     r21, 0x3F       ; 63\r
+ 13a:  97 d2           rcall   .+1326          ; 0x66a <__mulsf3>\r
+ 13c:  dc d1           rcall   .+952           ; 0x4f6 <__fixunssfsi>\r
+ 13e:  7b bd           out     0x2b, r23       ; 43\r
+ 140:  6a bd           out     0x2a, r22       ; 42\r
+       \r
+       // ON-time is determined by COMP[OCR1B]\r
+       // on_time_ms = 2*(TOP[OCR1A] - COMP[OCR1B]) / (1000 * F_CPU / (prescalar))\r
+       \r
+       OCR1B = OCR1A - ((BEEP_LENGTH_MS * (F_CPU / 1000.0)) / (2.0 * 65.0));\r
+ 142:  6a b5           in      r22, 0x2a       ; 42\r
+ 144:  7b b5           in      r23, 0x2b       ; 43\r
+ 146:  80 e0           ldi     r24, 0x00       ; 0\r
+ 148:  90 e0           ldi     r25, 0x00       ; 0\r
+ 14a:  01 d2           rcall   .+1026          ; 0x54e <__floatunsisf>\r
+ 14c:  25 ec           ldi     r18, 0xC5       ; 197\r
+ 14e:  3e e4           ldi     r19, 0x4E       ; 78\r
+ 150:  40 e4           ldi     r20, 0x40       ; 64\r
+ 152:  54 e4           ldi     r21, 0x44       ; 68\r
+ 154:  03 d1           rcall   .+518           ; 0x35c <__subsf3>\r
+ 156:  cf d1           rcall   .+926           ; 0x4f6 <__fixunssfsi>\r
+ 158:  79 bd           out     0x29, r23       ; 41\r
+ 15a:  68 bd           out     0x28, r22       ; 40\r
+       \r
+       sei();\r
+ 15c:  78 94           sei\r
+ 15e:  08 95           ret\r
+\r
+00000160 <main>:\r
+void set_beep_freq(uint16_t);\r
+void turn_off_beep();\r
+\r
+int main(void)\r
+{\r
+       cli();\r
+ 160:  f8 94           cli\r
+       \r
+       // Set up timer0 as clock, no pin output, interrupt, CTC\r
+       TCCR0A |= (1 << WGM01);\r
+ 162:  80 b7           in      r24, 0x30       ; 48\r
+ 164:  82 60           ori     r24, 0x02       ; 2\r
+ 166:  80 bf           out     0x30, r24       ; 48\r
+       TIMSK |= (1 << OCIE0A);\r
+ 168:  89 b7           in      r24, 0x39       ; 57\r
+ 16a:  81 60           ori     r24, 0x01       ; 1\r
+ 16c:  89 bf           out     0x39, r24       ; 57\r
+       OCR0A = F_CPU / 1024 / TIMER_INTERVAL_MS * 10;\r
+ 16e:  8a e5           ldi     r24, 0x5A       ; 90\r
+ 170:  86 bf           out     0x36, r24       ; 54\r
+       \r
+       // Set up timer1 as beeper, no pin output, interrupt, OCR1A is top, OCR1B is compare, PWM phase correct\r
+       TCCR1A |= (1 << WGM11) | (1 << WGM10);\r
+ 172:  8f b5           in      r24, 0x2f       ; 47\r
+ 174:  83 60           ori     r24, 0x03       ; 3\r
+ 176:  8f bd           out     0x2f, r24       ; 47\r
+       TCCR1B |= (1 << WGM13);\r
+ 178:  8e b5           in      r24, 0x2e       ; 46\r
+ 17a:  80 61           ori     r24, 0x10       ; 16\r
+ 17c:  8e bd           out     0x2e, r24       ; 46\r
+       TIMSK |= (1 << OCIE1B);\r
+ 17e:  89 b7           in      r24, 0x39       ; 57\r
+ 180:  80 62           ori     r24, 0x20       ; 32\r
+ 182:  89 bf           out     0x39, r24       ; 57\r
+       \r
+       // Pin outputs \r
+       DDRD = (1 << PIND4) | (1 << PIND3) | (1 << PIND2);\r
+ 184:  8c e1           ldi     r24, 0x1C       ; 28\r
+ 186:  81 bb           out     0x11, r24       ; 17\r
+       DDRB = (1 << PINB4);\r
+ 188:  80 e1           ldi     r24, 0x10       ; 16\r
+ 18a:  87 bb           out     0x17, r24       ; 23\r
+       \r
+\r
+       \r
+    /* Mainloops */\r
+       PORTD = 0x00;\r
+ 18c:  12 ba           out     0x12, r1        ; 18\r
+       sei();\r
+ 18e:  78 94           sei\r
+       while (!(PINB & 1))\r
+ 190:  12 c0           rjmp    .+36            ; 0x1b6 <main+0x56>\r
+       {\r
+               // Idle until button 1 is pressed, continously display starttime\r
+               display_num_msb(sec, MIDDLE, DP_ON);\r
+ 192:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 196:  47 ef           ldi     r20, 0xF7       ; 247\r
+ 198:  6f eb           ldi     r22, 0xBF       ; 191\r
+ 19a:  90 e0           ldi     r25, 0x00       ; 0\r
+ 19c:  91 df           rcall   .-222           ; 0xc0 <display_num_msb>\r
+               display_num_msb(ten_sec, LEFT, DP_OFF);\r
+ 19e:  80 91 60 00     lds     r24, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 1a2:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 1a4:  6f e7           ldi     r22, 0x7F       ; 127\r
+ 1a6:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1a8:  8b df           rcall   .-234           ; 0xc0 <display_num_msb>\r
+               display_num_msb(sec_ten, RIGHT, DP_OFF);\r
+ 1aa:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 1ae:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 1b0:  6f ed           ldi     r22, 0xDF       ; 223\r
+ 1b2:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1b4:  85 df           rcall   .-246           ; 0xc0 <display_num_msb>\r
+\r
+       \r
+    /* Mainloops */\r
+       PORTD = 0x00;\r
+       sei();\r
+       while (!(PINB & 1))\r
+ 1b6:  b0 9b           sbis    0x16, 0 ; 22\r
+ 1b8:  ec cf           rjmp    .-40            ; 0x192 <main+0x32>\r
+               display_num_msb(ten_sec, LEFT, DP_OFF);\r
+               display_num_msb(sec_ten, RIGHT, DP_OFF);\r
+       }\r
+       \r
+       // Start timer0 with prescaler of 1024\r
+       TCCR0B |= (1 << CS02) | (0 << CS01) | (1 << CS00);\r
+ 1ba:  83 b7           in      r24, 0x33       ; 51\r
+ 1bc:  85 60           ori     r24, 0x05       ; 5\r
+ 1be:  83 bf           out     0x33, r24       ; 51\r
+\r
+       // Start beeping once every 5 seconds\r
+       set_beep_freq(200);\r
+ 1c0:  88 ec           ldi     r24, 0xC8       ; 200\r
+ 1c2:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1c4:  9f df           rcall   .-194           ; 0x104 <set_beep_freq>\r
+       \r
+       // Start timer1 with prescaler of 64\r
+       TCCR1B |= (0 << CS12) | (1 << CS11) | (1 << CS10);\r
+ 1c6:  8e b5           in      r24, 0x2e       ; 46\r
+ 1c8:  83 60           ori     r24, 0x03       ; 3\r
+ 1ca:  8e bd           out     0x2e, r24       ; 46\r
+       \r
+    while (1) \r
+    {\r
+               // Turn of dp if detonated\r
+               if (boom)\r
+ 1cc:  80 91 78 00     lds     r24, 0x0078     ; 0x800078 <__data_end>\r
+ 1d0:  88 23           and     r24, r24\r
+ 1d2:  39 f0           breq    .+14            ; 0x1e2 <main+0x82>\r
+               {\r
+                       display_num_msb(sec, MIDDLE, DP_OFF);\r
+ 1d4:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 1d8:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 1da:  6f eb           ldi     r22, 0xBF       ; 191\r
+ 1dc:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1de:  70 df           rcall   .-288           ; 0xc0 <display_num_msb>\r
+ 1e0:  06 c0           rjmp    .+12            ; 0x1ee <main+0x8e>\r
+               }\r
+               else\r
+               {\r
+                       display_num_msb(sec, MIDDLE, DP_ON);\r
+ 1e2:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 1e6:  47 ef           ldi     r20, 0xF7       ; 247\r
+ 1e8:  6f eb           ldi     r22, 0xBF       ; 191\r
+ 1ea:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1ec:  69 df           rcall   .-302           ; 0xc0 <display_num_msb>\r
+               }\r
+               \r
+               display_num_msb(ten_sec, LEFT, DP_OFF);\r
+ 1ee:  80 91 60 00     lds     r24, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 1f2:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 1f4:  6f e7           ldi     r22, 0x7F       ; 127\r
+ 1f6:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1f8:  63 df           rcall   .-314           ; 0xc0 <display_num_msb>\r
+               display_num_msb(sec_ten, RIGHT, DP_OFF);\r
+ 1fa:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 1fe:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 200:  6f ed           ldi     r22, 0xDF       ; 223\r
+ 202:  90 e0           ldi     r25, 0x00       ; 0\r
+ 204:  5d df           rcall   .-326           ; 0xc0 <display_num_msb>\r
+    }\r
+ 206:  e2 cf           rjmp    .-60            ; 0x1cc <main+0x6c>\r
+\r
+00000208 <__vector_13>:\r
+ISR (TIMER1_COMPB_vect)\r
+{\r
+       PORTB ^= (1 << PINB4);\r
+}\r
+\r
+ISR (TIMER0_COMPA_vect) {\r
+ 208:  1f 92           push    r1\r
+ 20a:  0f 92           push    r0\r
+ 20c:  0f b6           in      r0, 0x3f        ; 63\r
+ 20e:  0f 92           push    r0\r
+ 210:  11 24           eor     r1, r1\r
+ 212:  cf 92           push    r12\r
+ 214:  df 92           push    r13\r
+ 216:  ef 92           push    r14\r
+ 218:  ff 92           push    r15\r
+ 21a:  2f 93           push    r18\r
+ 21c:  3f 93           push    r19\r
+ 21e:  4f 93           push    r20\r
+ 220:  5f 93           push    r21\r
+ 222:  6f 93           push    r22\r
+ 224:  7f 93           push    r23\r
+ 226:  8f 93           push    r24\r
+ 228:  9f 93           push    r25\r
+ 22a:  af 93           push    r26\r
+ 22c:  bf 93           push    r27\r
+ 22e:  ef 93           push    r30\r
+ 230:  ff 93           push    r31\r
+       \r
+       // Flash on and off after detonation\r
+       if (boom & 1)\r
+ 232:  80 91 78 00     lds     r24, 0x0078     ; 0x800078 <__data_end>\r
+ 236:  80 ff           sbrs    r24, 0\r
+ 238:  0b c0           rjmp    .+22            ; 0x250 <__vector_13+0x48>\r
+       {\r
+               // Flash off\r
+               //PORTB = (1<< PINB4);\r
+               ten_sec = DISPLAY_OFF;\r
+ 23a:  8a e0           ldi     r24, 0x0A       ; 10\r
+ 23c:  80 93 60 00     sts     0x0060, r24     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+               sec = DISPLAY_OFF;\r
+ 240:  80 93 7a 00     sts     0x007A, r24     ; 0x80007a <sec>\r
+               sec_ten = DISPLAY_OFF;\r
+ 244:  80 93 79 00     sts     0x0079, r24     ; 0x800079 <sec_ten>\r
+               \r
+               boom = 2;\r
+ 248:  82 e0           ldi     r24, 0x02       ; 2\r
+ 24a:  80 93 78 00     sts     0x0078, r24     ; 0x800078 <__data_end>\r
+ 24e:  71 c0           rjmp    .+226           ; 0x332 <__vector_13+0x12a>\r
+       }\r
+       else if (boom & 2)\r
+ 250:  80 91 78 00     lds     r24, 0x0078     ; 0x800078 <__data_end>\r
+ 254:  81 ff           sbrs    r24, 1\r
+ 256:  0b c0           rjmp    .+22            ; 0x26e <__vector_13+0x66>\r
+       {\r
+               PORTB = (0<< PINB4);\r
+ 258:  18 ba           out     0x18, r1        ; 24\r
+               // Flash 0\r
+               ten_sec = 0;\r
+ 25a:  10 92 60 00     sts     0x0060, r1      ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+               sec = 0;\r
+ 25e:  10 92 7a 00     sts     0x007A, r1      ; 0x80007a <sec>\r
+               sec_ten = 0;\r
+ 262:  10 92 79 00     sts     0x0079, r1      ; 0x800079 <sec_ten>\r
+               \r
+               boom = 1;\r
+ 266:  81 e0           ldi     r24, 0x01       ; 1\r
+ 268:  80 93 78 00     sts     0x0078, r24     ; 0x800078 <__data_end>\r
+ 26c:  62 c0           rjmp    .+196           ; 0x332 <__vector_13+0x12a>\r
+       \r
+       // Countdown\r
+       else\r
+       {\r
+               // 0.1 to prevent divide by 0\r
+               set_beep_freq(200.0 * 60.0 / ((10.0 * ten_sec) + sec + 0.1));\r
+ 26e:  60 91 60 00     lds     r22, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 272:  70 e0           ldi     r23, 0x00       ; 0\r
+ 274:  80 e0           ldi     r24, 0x00       ; 0\r
+ 276:  90 e0           ldi     r25, 0x00       ; 0\r
+ 278:  6c d1           rcall   .+728           ; 0x552 <__floatsisf>\r
+ 27a:  20 e0           ldi     r18, 0x00       ; 0\r
+ 27c:  30 e0           ldi     r19, 0x00       ; 0\r
+ 27e:  40 e2           ldi     r20, 0x20       ; 32\r
+ 280:  51 e4           ldi     r21, 0x41       ; 65\r
+ 282:  f3 d1           rcall   .+998           ; 0x66a <__mulsf3>\r
+ 284:  6b 01           movw    r12, r22\r
+ 286:  7c 01           movw    r14, r24\r
+ 288:  60 91 7a 00     lds     r22, 0x007A     ; 0x80007a <sec>\r
+ 28c:  70 e0           ldi     r23, 0x00       ; 0\r
+ 28e:  80 e0           ldi     r24, 0x00       ; 0\r
+ 290:  90 e0           ldi     r25, 0x00       ; 0\r
+ 292:  5f d1           rcall   .+702           ; 0x552 <__floatsisf>\r
+ 294:  a7 01           movw    r20, r14\r
+ 296:  96 01           movw    r18, r12\r
+ 298:  62 d0           rcall   .+196           ; 0x35e <__addsf3>\r
+ 29a:  2d ec           ldi     r18, 0xCD       ; 205\r
+ 29c:  3c ec           ldi     r19, 0xCC       ; 204\r
+ 29e:  4c ec           ldi     r20, 0xCC       ; 204\r
+ 2a0:  5d e3           ldi     r21, 0x3D       ; 61\r
+ 2a2:  5d d0           rcall   .+186           ; 0x35e <__addsf3>\r
+ 2a4:  9b 01           movw    r18, r22\r
+ 2a6:  ac 01           movw    r20, r24\r
+ 2a8:  60 e0           ldi     r22, 0x00       ; 0\r
+ 2aa:  70 e8           ldi     r23, 0x80       ; 128\r
+ 2ac:  8b e3           ldi     r24, 0x3B       ; 59\r
+ 2ae:  96 e4           ldi     r25, 0x46       ; 70\r
+ 2b0:  ba d0           rcall   .+372           ; 0x426 <__divsf3>\r
+ 2b2:  21 d1           rcall   .+578           ; 0x4f6 <__fixunssfsi>\r
+ 2b4:  cb 01           movw    r24, r22\r
+ 2b6:  26 df           rcall   .-436           ; 0x104 <set_beep_freq>\r
+               \r
+               if (ten_sec == 0 && sec == 0 && sec_ten) \r
+ 2b8:  80 91 60 00     lds     r24, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 2bc:  81 11           cpse    r24, r1\r
+ 2be:  14 c0           rjmp    .+40            ; 0x2e8 <__vector_13+0xe0>\r
+ 2c0:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 2c4:  81 11           cpse    r24, r1\r
+ 2c6:  10 c0           rjmp    .+32            ; 0x2e8 <__vector_13+0xe0>\r
+ 2c8:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 2cc:  88 23           and     r24, r24\r
+ 2ce:  61 f0           breq    .+24            ; 0x2e8 <__vector_13+0xe0>\r
+               {\r
+                       ten_sec = 0;\r
+ 2d0:  10 92 60 00     sts     0x0060, r1      ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+                       sec = 0;\r
+ 2d4:  10 92 7a 00     sts     0x007A, r1      ; 0x80007a <sec>\r
+                       sec_ten = 0;\r
+ 2d8:  10 92 79 00     sts     0x0079, r1      ; 0x800079 <sec_ten>\r
+               \r
+                       // Detonate, slow down timer for flashing\r
+                       boom = 1;\r
+ 2dc:  81 e0           ldi     r24, 0x01       ; 1\r
+ 2de:  80 93 78 00     sts     0x0078, r24     ; 0x800078 <__data_end>\r
+                       OCR0A = 98 * 2;\r
+ 2e2:  84 ec           ldi     r24, 0xC4       ; 196\r
+ 2e4:  86 bf           out     0x36, r24       ; 54\r
+ 2e6:  25 c0           rjmp    .+74            ; 0x332 <__vector_13+0x12a>\r
+               }\r
+               else\r
+               {\r
+                       if (sec == 0 && sec_ten == 0)\r
+ 2e8:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 2ec:  81 11           cpse    r24, r1\r
+ 2ee:  0f c0           rjmp    .+30            ; 0x30e <__vector_13+0x106>\r
+ 2f0:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 2f4:  81 11           cpse    r24, r1\r
+ 2f6:  0b c0           rjmp    .+22            ; 0x30e <__vector_13+0x106>\r
+                       {\r
+                               sec = 9;\r
+ 2f8:  89 e0           ldi     r24, 0x09       ; 9\r
+ 2fa:  80 93 7a 00     sts     0x007A, r24     ; 0x80007a <sec>\r
+                               sec_ten = 9;\r
+ 2fe:  80 93 79 00     sts     0x0079, r24     ; 0x800079 <sec_ten>\r
+                               ten_sec--;\r
+ 302:  80 91 60 00     lds     r24, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 306:  81 50           subi    r24, 0x01       ; 1\r
+ 308:  80 93 60 00     sts     0x0060, r24     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 30c:  12 c0           rjmp    .+36            ; 0x332 <__vector_13+0x12a>\r
+                       }\r
+                       else\r
+                       {\r
+                               if (sec_ten == 0)\r
+ 30e:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 312:  81 11           cpse    r24, r1\r
+ 314:  09 c0           rjmp    .+18            ; 0x328 <__vector_13+0x120>\r
+                               {\r
+                                       sec_ten = 9;\r
+ 316:  89 e0           ldi     r24, 0x09       ; 9\r
+ 318:  80 93 79 00     sts     0x0079, r24     ; 0x800079 <sec_ten>\r
+                                       sec--;\r
+ 31c:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 320:  81 50           subi    r24, 0x01       ; 1\r
+ 322:  80 93 7a 00     sts     0x007A, r24     ; 0x80007a <sec>\r
+ 326:  05 c0           rjmp    .+10            ; 0x332 <__vector_13+0x12a>\r
+                               }\r
+                               else\r
+                               {\r
+                                       sec_ten--;\r
+ 328:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 32c:  81 50           subi    r24, 0x01       ; 1\r
+ 32e:  80 93 79 00     sts     0x0079, r24     ; 0x800079 <sec_ten>\r
+                               }\r
+                       }\r
+               }\r
+       }\r
+}\r
+ 332:  ff 91           pop     r31\r
+ 334:  ef 91           pop     r30\r
+ 336:  bf 91           pop     r27\r
+ 338:  af 91           pop     r26\r
+ 33a:  9f 91           pop     r25\r
+ 33c:  8f 91           pop     r24\r
+ 33e:  7f 91           pop     r23\r
+ 340:  6f 91           pop     r22\r
+ 342:  5f 91           pop     r21\r
+ 344:  4f 91           pop     r20\r
+ 346:  3f 91           pop     r19\r
+ 348:  2f 91           pop     r18\r
+ 34a:  ff 90           pop     r15\r
+ 34c:  ef 90           pop     r14\r
+ 34e:  df 90           pop     r13\r
+ 350:  cf 90           pop     r12\r
+ 352:  0f 90           pop     r0\r
+ 354:  0f be           out     0x3f, r0        ; 63\r
+ 356:  0f 90           pop     r0\r
+ 358:  1f 90           pop     r1\r
+ 35a:  18 95           reti\r
+\r
+0000035c <__subsf3>:\r
+ 35c:  50 58           subi    r21, 0x80       ; 128\r
+\r
+0000035e <__addsf3>:\r
+ 35e:  bb 27           eor     r27, r27\r
+ 360:  aa 27           eor     r26, r26\r
+ 362:  0e d0           rcall   .+28            ; 0x380 <__addsf3x>\r
+ 364:  48 c1           rjmp    .+656           ; 0x5f6 <__fp_round>\r
+ 366:  39 d1           rcall   .+626           ; 0x5da <__fp_pscA>\r
+ 368:  30 f0           brcs    .+12            ; 0x376 <__addsf3+0x18>\r
+ 36a:  3e d1           rcall   .+636           ; 0x5e8 <__fp_pscB>\r
+ 36c:  20 f0           brcs    .+8             ; 0x376 <__addsf3+0x18>\r
+ 36e:  31 f4           brne    .+12            ; 0x37c <__addsf3+0x1e>\r
+ 370:  9f 3f           cpi     r25, 0xFF       ; 255\r
+ 372:  11 f4           brne    .+4             ; 0x378 <__addsf3+0x1a>\r
+ 374:  1e f4           brtc    .+6             ; 0x37c <__addsf3+0x1e>\r
+ 376:  2e c1           rjmp    .+604           ; 0x5d4 <__fp_nan>\r
+ 378:  0e f4           brtc    .+2             ; 0x37c <__addsf3+0x1e>\r
+ 37a:  e0 95           com     r30\r
+ 37c:  e7 fb           bst     r30, 7\r
+ 37e:  24 c1           rjmp    .+584           ; 0x5c8 <__fp_inf>\r
+\r
+00000380 <__addsf3x>:\r
+ 380:  e9 2f           mov     r30, r25\r
+ 382:  4a d1           rcall   .+660           ; 0x618 <__fp_split3>\r
+ 384:  80 f3           brcs    .-32            ; 0x366 <__addsf3+0x8>\r
+ 386:  ba 17           cp      r27, r26\r
+ 388:  62 07           cpc     r22, r18\r
+ 38a:  73 07           cpc     r23, r19\r
+ 38c:  84 07           cpc     r24, r20\r
+ 38e:  95 07           cpc     r25, r21\r
+ 390:  18 f0           brcs    .+6             ; 0x398 <__addsf3x+0x18>\r
+ 392:  71 f4           brne    .+28            ; 0x3b0 <__addsf3x+0x30>\r
+ 394:  9e f5           brtc    .+102           ; 0x3fc <__addsf3x+0x7c>\r
+ 396:  62 c1           rjmp    .+708           ; 0x65c <__fp_zero>\r
+ 398:  0e f4           brtc    .+2             ; 0x39c <__addsf3x+0x1c>\r
+ 39a:  e0 95           com     r30\r
+ 39c:  0b 2e           mov     r0, r27\r
+ 39e:  ba 2f           mov     r27, r26\r
+ 3a0:  a0 2d           mov     r26, r0\r
+ 3a2:  0b 01           movw    r0, r22\r
+ 3a4:  b9 01           movw    r22, r18\r
+ 3a6:  90 01           movw    r18, r0\r
+ 3a8:  0c 01           movw    r0, r24\r
+ 3aa:  ca 01           movw    r24, r20\r
+ 3ac:  a0 01           movw    r20, r0\r
+ 3ae:  11 24           eor     r1, r1\r
+ 3b0:  ff 27           eor     r31, r31\r
+ 3b2:  59 1b           sub     r21, r25\r
+ 3b4:  99 f0           breq    .+38            ; 0x3dc <__addsf3x+0x5c>\r
+ 3b6:  59 3f           cpi     r21, 0xF9       ; 249\r
+ 3b8:  50 f4           brcc    .+20            ; 0x3ce <__addsf3x+0x4e>\r
+ 3ba:  50 3e           cpi     r21, 0xE0       ; 224\r
+ 3bc:  68 f1           brcs    .+90            ; 0x418 <__LOCK_REGION_LENGTH__+0x18>\r
+ 3be:  1a 16           cp      r1, r26\r
+ 3c0:  f0 40           sbci    r31, 0x00       ; 0\r
+ 3c2:  a2 2f           mov     r26, r18\r
+ 3c4:  23 2f           mov     r18, r19\r
+ 3c6:  34 2f           mov     r19, r20\r
+ 3c8:  44 27           eor     r20, r20\r
+ 3ca:  58 5f           subi    r21, 0xF8       ; 248\r
+ 3cc:  f3 cf           rjmp    .-26            ; 0x3b4 <__addsf3x+0x34>\r
+ 3ce:  46 95           lsr     r20\r
+ 3d0:  37 95           ror     r19\r
+ 3d2:  27 95           ror     r18\r
+ 3d4:  a7 95           ror     r26\r
+ 3d6:  f0 40           sbci    r31, 0x00       ; 0\r
+ 3d8:  53 95           inc     r21\r
+ 3da:  c9 f7           brne    .-14            ; 0x3ce <__addsf3x+0x4e>\r
+ 3dc:  7e f4           brtc    .+30            ; 0x3fc <__addsf3x+0x7c>\r
+ 3de:  1f 16           cp      r1, r31\r
+ 3e0:  ba 0b           sbc     r27, r26\r
+ 3e2:  62 0b           sbc     r22, r18\r
+ 3e4:  73 0b           sbc     r23, r19\r
+ 3e6:  84 0b           sbc     r24, r20\r
+ 3e8:  ba f0           brmi    .+46            ; 0x418 <__LOCK_REGION_LENGTH__+0x18>\r
+ 3ea:  91 50           subi    r25, 0x01       ; 1\r
+ 3ec:  a1 f0           breq    .+40            ; 0x416 <__LOCK_REGION_LENGTH__+0x16>\r
+ 3ee:  ff 0f           add     r31, r31\r
+ 3f0:  bb 1f           adc     r27, r27\r
+ 3f2:  66 1f           adc     r22, r22\r
+ 3f4:  77 1f           adc     r23, r23\r
+ 3f6:  88 1f           adc     r24, r24\r
+ 3f8:  c2 f7           brpl    .-16            ; 0x3ea <__addsf3x+0x6a>\r
+ 3fa:  0e c0           rjmp    .+28            ; 0x418 <__LOCK_REGION_LENGTH__+0x18>\r
+ 3fc:  ba 0f           add     r27, r26\r
+ 3fe:  62 1f           adc     r22, r18\r
+ 400:  73 1f           adc     r23, r19\r
+ 402:  84 1f           adc     r24, r20\r
+ 404:  48 f4           brcc    .+18            ; 0x418 <__LOCK_REGION_LENGTH__+0x18>\r
+ 406:  87 95           ror     r24\r
+ 408:  77 95           ror     r23\r
+ 40a:  67 95           ror     r22\r
+ 40c:  b7 95           ror     r27\r
+ 40e:  f7 95           ror     r31\r
+ 410:  9e 3f           cpi     r25, 0xFE       ; 254\r
+ 412:  08 f0           brcs    .+2             ; 0x416 <__LOCK_REGION_LENGTH__+0x16>\r
+ 414:  b3 cf           rjmp    .-154           ; 0x37c <__addsf3+0x1e>\r
+ 416:  93 95           inc     r25\r
+ 418:  88 0f           add     r24, r24\r
+ 41a:  08 f0           brcs    .+2             ; 0x41e <__LOCK_REGION_LENGTH__+0x1e>\r
+ 41c:  99 27           eor     r25, r25\r
+ 41e:  ee 0f           add     r30, r30\r
+ 420:  97 95           ror     r25\r
+ 422:  87 95           ror     r24\r
+ 424:  08 95           ret\r
+\r
+00000426 <__divsf3>:\r
+ 426:  0c d0           rcall   .+24            ; 0x440 <__divsf3x>\r
+ 428:  e6 c0           rjmp    .+460           ; 0x5f6 <__fp_round>\r
+ 42a:  de d0           rcall   .+444           ; 0x5e8 <__fp_pscB>\r
+ 42c:  40 f0           brcs    .+16            ; 0x43e <__divsf3+0x18>\r
+ 42e:  d5 d0           rcall   .+426           ; 0x5da <__fp_pscA>\r
+ 430:  30 f0           brcs    .+12            ; 0x43e <__divsf3+0x18>\r
+ 432:  21 f4           brne    .+8             ; 0x43c <__divsf3+0x16>\r
+ 434:  5f 3f           cpi     r21, 0xFF       ; 255\r
+ 436:  19 f0           breq    .+6             ; 0x43e <__divsf3+0x18>\r
+ 438:  c7 c0           rjmp    .+398           ; 0x5c8 <__fp_inf>\r
+ 43a:  51 11           cpse    r21, r1\r
+ 43c:  10 c1           rjmp    .+544           ; 0x65e <__fp_szero>\r
+ 43e:  ca c0           rjmp    .+404           ; 0x5d4 <__fp_nan>\r
+\r
+00000440 <__divsf3x>:\r
+ 440:  eb d0           rcall   .+470           ; 0x618 <__fp_split3>\r
+ 442:  98 f3           brcs    .-26            ; 0x42a <__divsf3+0x4>\r
+\r
+00000444 <__divsf3_pse>:\r
+ 444:  99 23           and     r25, r25\r
+ 446:  c9 f3           breq    .-14            ; 0x43a <__divsf3+0x14>\r
+ 448:  55 23           and     r21, r21\r
+ 44a:  b1 f3           breq    .-20            ; 0x438 <__divsf3+0x12>\r
+ 44c:  95 1b           sub     r25, r21\r
+ 44e:  55 0b           sbc     r21, r21\r
+ 450:  bb 27           eor     r27, r27\r
+ 452:  aa 27           eor     r26, r26\r
+ 454:  62 17           cp      r22, r18\r
+ 456:  73 07           cpc     r23, r19\r
+ 458:  84 07           cpc     r24, r20\r
+ 45a:  38 f0           brcs    .+14            ; 0x46a <__divsf3_pse+0x26>\r
+ 45c:  9f 5f           subi    r25, 0xFF       ; 255\r
+ 45e:  5f 4f           sbci    r21, 0xFF       ; 255\r
+ 460:  22 0f           add     r18, r18\r
+ 462:  33 1f           adc     r19, r19\r
+ 464:  44 1f           adc     r20, r20\r
+ 466:  aa 1f           adc     r26, r26\r
+ 468:  a9 f3           breq    .-22            ; 0x454 <__divsf3_pse+0x10>\r
+ 46a:  33 d0           rcall   .+102           ; 0x4d2 <__divsf3_pse+0x8e>\r
+ 46c:  0e 2e           mov     r0, r30\r
+ 46e:  3a f0           brmi    .+14            ; 0x47e <__divsf3_pse+0x3a>\r
+ 470:  e0 e8           ldi     r30, 0x80       ; 128\r
+ 472:  30 d0           rcall   .+96            ; 0x4d4 <__divsf3_pse+0x90>\r
+ 474:  91 50           subi    r25, 0x01       ; 1\r
+ 476:  50 40           sbci    r21, 0x00       ; 0\r
+ 478:  e6 95           lsr     r30\r
+ 47a:  00 1c           adc     r0, r0\r
+ 47c:  ca f7           brpl    .-14            ; 0x470 <__divsf3_pse+0x2c>\r
+ 47e:  29 d0           rcall   .+82            ; 0x4d2 <__divsf3_pse+0x8e>\r
+ 480:  fe 2f           mov     r31, r30\r
+ 482:  27 d0           rcall   .+78            ; 0x4d2 <__divsf3_pse+0x8e>\r
+ 484:  66 0f           add     r22, r22\r
+ 486:  77 1f           adc     r23, r23\r
+ 488:  88 1f           adc     r24, r24\r
+ 48a:  bb 1f           adc     r27, r27\r
+ 48c:  26 17           cp      r18, r22\r
+ 48e:  37 07           cpc     r19, r23\r
+ 490:  48 07           cpc     r20, r24\r
+ 492:  ab 07           cpc     r26, r27\r
+ 494:  b0 e8           ldi     r27, 0x80       ; 128\r
+ 496:  09 f0           breq    .+2             ; 0x49a <__divsf3_pse+0x56>\r
+ 498:  bb 0b           sbc     r27, r27\r
+ 49a:  80 2d           mov     r24, r0\r
+ 49c:  bf 01           movw    r22, r30\r
+ 49e:  ff 27           eor     r31, r31\r
+ 4a0:  93 58           subi    r25, 0x83       ; 131\r
+ 4a2:  5f 4f           sbci    r21, 0xFF       ; 255\r
+ 4a4:  2a f0           brmi    .+10            ; 0x4b0 <__divsf3_pse+0x6c>\r
+ 4a6:  9e 3f           cpi     r25, 0xFE       ; 254\r
+ 4a8:  51 05           cpc     r21, r1\r
+ 4aa:  68 f0           brcs    .+26            ; 0x4c6 <__divsf3_pse+0x82>\r
+ 4ac:  8d c0           rjmp    .+282           ; 0x5c8 <__fp_inf>\r
+ 4ae:  d7 c0           rjmp    .+430           ; 0x65e <__fp_szero>\r
+ 4b0:  5f 3f           cpi     r21, 0xFF       ; 255\r
+ 4b2:  ec f3           brlt    .-6             ; 0x4ae <__divsf3_pse+0x6a>\r
+ 4b4:  98 3e           cpi     r25, 0xE8       ; 232\r
+ 4b6:  dc f3           brlt    .-10            ; 0x4ae <__divsf3_pse+0x6a>\r
+ 4b8:  86 95           lsr     r24\r
+ 4ba:  77 95           ror     r23\r
+ 4bc:  67 95           ror     r22\r
+ 4be:  b7 95           ror     r27\r
+ 4c0:  f7 95           ror     r31\r
+ 4c2:  9f 5f           subi    r25, 0xFF       ; 255\r
+ 4c4:  c9 f7           brne    .-14            ; 0x4b8 <__divsf3_pse+0x74>\r
+ 4c6:  88 0f           add     r24, r24\r
+ 4c8:  91 1d           adc     r25, r1\r
+ 4ca:  96 95           lsr     r25\r
+ 4cc:  87 95           ror     r24\r
+ 4ce:  97 f9           bld     r25, 7\r
+ 4d0:  08 95           ret\r
+ 4d2:  e1 e0           ldi     r30, 0x01       ; 1\r
+ 4d4:  66 0f           add     r22, r22\r
+ 4d6:  77 1f           adc     r23, r23\r
+ 4d8:  88 1f           adc     r24, r24\r
+ 4da:  bb 1f           adc     r27, r27\r
+ 4dc:  62 17           cp      r22, r18\r
+ 4de:  73 07           cpc     r23, r19\r
+ 4e0:  84 07           cpc     r24, r20\r
+ 4e2:  ba 07           cpc     r27, r26\r
+ 4e4:  20 f0           brcs    .+8             ; 0x4ee <__divsf3_pse+0xaa>\r
+ 4e6:  62 1b           sub     r22, r18\r
+ 4e8:  73 0b           sbc     r23, r19\r
+ 4ea:  84 0b           sbc     r24, r20\r
+ 4ec:  ba 0b           sbc     r27, r26\r
+ 4ee:  ee 1f           adc     r30, r30\r
+ 4f0:  88 f7           brcc    .-30            ; 0x4d4 <__divsf3_pse+0x90>\r
+ 4f2:  e0 95           com     r30\r
+ 4f4:  08 95           ret\r
+\r
+000004f6 <__fixunssfsi>:\r
+ 4f6:  98 d0           rcall   .+304           ; 0x628 <__fp_splitA>\r
+ 4f8:  88 f0           brcs    .+34            ; 0x51c <__fixunssfsi+0x26>\r
+ 4fa:  9f 57           subi    r25, 0x7F       ; 127\r
+ 4fc:  90 f0           brcs    .+36            ; 0x522 <__fixunssfsi+0x2c>\r
+ 4fe:  b9 2f           mov     r27, r25\r
+ 500:  99 27           eor     r25, r25\r
+ 502:  b7 51           subi    r27, 0x17       ; 23\r
+ 504:  a0 f0           brcs    .+40            ; 0x52e <__fixunssfsi+0x38>\r
+ 506:  d1 f0           breq    .+52            ; 0x53c <__fixunssfsi+0x46>\r
+ 508:  66 0f           add     r22, r22\r
+ 50a:  77 1f           adc     r23, r23\r
+ 50c:  88 1f           adc     r24, r24\r
+ 50e:  99 1f           adc     r25, r25\r
+ 510:  1a f0           brmi    .+6             ; 0x518 <__fixunssfsi+0x22>\r
+ 512:  ba 95           dec     r27\r
+ 514:  c9 f7           brne    .-14            ; 0x508 <__fixunssfsi+0x12>\r
+ 516:  12 c0           rjmp    .+36            ; 0x53c <__fixunssfsi+0x46>\r
+ 518:  b1 30           cpi     r27, 0x01       ; 1\r
+ 51a:  81 f0           breq    .+32            ; 0x53c <__fixunssfsi+0x46>\r
+ 51c:  9f d0           rcall   .+318           ; 0x65c <__fp_zero>\r
+ 51e:  b1 e0           ldi     r27, 0x01       ; 1\r
+ 520:  08 95           ret\r
+ 522:  9c c0           rjmp    .+312           ; 0x65c <__fp_zero>\r
+ 524:  67 2f           mov     r22, r23\r
+ 526:  78 2f           mov     r23, r24\r
+ 528:  88 27           eor     r24, r24\r
+ 52a:  b8 5f           subi    r27, 0xF8       ; 248\r
+ 52c:  39 f0           breq    .+14            ; 0x53c <__fixunssfsi+0x46>\r
+ 52e:  b9 3f           cpi     r27, 0xF9       ; 249\r
+ 530:  cc f3           brlt    .-14            ; 0x524 <__fixunssfsi+0x2e>\r
+ 532:  86 95           lsr     r24\r
+ 534:  77 95           ror     r23\r
+ 536:  67 95           ror     r22\r
+ 538:  b3 95           inc     r27\r
+ 53a:  d9 f7           brne    .-10            ; 0x532 <__fixunssfsi+0x3c>\r
+ 53c:  3e f4           brtc    .+14            ; 0x54c <__fixunssfsi+0x56>\r
+ 53e:  90 95           com     r25\r
+ 540:  80 95           com     r24\r
+ 542:  70 95           com     r23\r
+ 544:  61 95           neg     r22\r
+ 546:  7f 4f           sbci    r23, 0xFF       ; 255\r
+ 548:  8f 4f           sbci    r24, 0xFF       ; 255\r
+ 54a:  9f 4f           sbci    r25, 0xFF       ; 255\r
+ 54c:  08 95           ret\r
+\r
+0000054e <__floatunsisf>:\r
+ 54e:  e8 94           clt\r
+ 550:  09 c0           rjmp    .+18            ; 0x564 <__floatsisf+0x12>\r
+\r
+00000552 <__floatsisf>:\r
+ 552:  97 fb           bst     r25, 7\r
+ 554:  3e f4           brtc    .+14            ; 0x564 <__floatsisf+0x12>\r
+ 556:  90 95           com     r25\r
+ 558:  80 95           com     r24\r
+ 55a:  70 95           com     r23\r
+ 55c:  61 95           neg     r22\r
+ 55e:  7f 4f           sbci    r23, 0xFF       ; 255\r
+ 560:  8f 4f           sbci    r24, 0xFF       ; 255\r
+ 562:  9f 4f           sbci    r25, 0xFF       ; 255\r
+ 564:  99 23           and     r25, r25\r
+ 566:  a9 f0           breq    .+42            ; 0x592 <__floatsisf+0x40>\r
+ 568:  f9 2f           mov     r31, r25\r
+ 56a:  96 e9           ldi     r25, 0x96       ; 150\r
+ 56c:  bb 27           eor     r27, r27\r
+ 56e:  93 95           inc     r25\r
+ 570:  f6 95           lsr     r31\r
+ 572:  87 95           ror     r24\r
+ 574:  77 95           ror     r23\r
+ 576:  67 95           ror     r22\r
+ 578:  b7 95           ror     r27\r
+ 57a:  f1 11           cpse    r31, r1\r
+ 57c:  f8 cf           rjmp    .-16            ; 0x56e <__floatsisf+0x1c>\r
+ 57e:  fa f4           brpl    .+62            ; 0x5be <__floatsisf+0x6c>\r
+ 580:  bb 0f           add     r27, r27\r
+ 582:  11 f4           brne    .+4             ; 0x588 <__floatsisf+0x36>\r
+ 584:  60 ff           sbrs    r22, 0\r
+ 586:  1b c0           rjmp    .+54            ; 0x5be <__floatsisf+0x6c>\r
+ 588:  6f 5f           subi    r22, 0xFF       ; 255\r
+ 58a:  7f 4f           sbci    r23, 0xFF       ; 255\r
+ 58c:  8f 4f           sbci    r24, 0xFF       ; 255\r
+ 58e:  9f 4f           sbci    r25, 0xFF       ; 255\r
+ 590:  16 c0           rjmp    .+44            ; 0x5be <__floatsisf+0x6c>\r
+ 592:  88 23           and     r24, r24\r
+ 594:  11 f0           breq    .+4             ; 0x59a <__floatsisf+0x48>\r
+ 596:  96 e9           ldi     r25, 0x96       ; 150\r
+ 598:  11 c0           rjmp    .+34            ; 0x5bc <__floatsisf+0x6a>\r
+ 59a:  77 23           and     r23, r23\r
+ 59c:  21 f0           breq    .+8             ; 0x5a6 <__floatsisf+0x54>\r
+ 59e:  9e e8           ldi     r25, 0x8E       ; 142\r
+ 5a0:  87 2f           mov     r24, r23\r
+ 5a2:  76 2f           mov     r23, r22\r
+ 5a4:  05 c0           rjmp    .+10            ; 0x5b0 <__floatsisf+0x5e>\r
+ 5a6:  66 23           and     r22, r22\r
+ 5a8:  71 f0           breq    .+28            ; 0x5c6 <__floatsisf+0x74>\r
+ 5aa:  96 e8           ldi     r25, 0x86       ; 134\r
+ 5ac:  86 2f           mov     r24, r22\r
+ 5ae:  70 e0           ldi     r23, 0x00       ; 0\r
+ 5b0:  60 e0           ldi     r22, 0x00       ; 0\r
+ 5b2:  2a f0           brmi    .+10            ; 0x5be <__floatsisf+0x6c>\r
+ 5b4:  9a 95           dec     r25\r
+ 5b6:  66 0f           add     r22, r22\r
+ 5b8:  77 1f           adc     r23, r23\r
+ 5ba:  88 1f           adc     r24, r24\r
+ 5bc:  da f7           brpl    .-10            ; 0x5b4 <__floatsisf+0x62>\r
+ 5be:  88 0f           add     r24, r24\r
+ 5c0:  96 95           lsr     r25\r
+ 5c2:  87 95           ror     r24\r
+ 5c4:  97 f9           bld     r25, 7\r
+ 5c6:  08 95           ret\r
+\r
+000005c8 <__fp_inf>:\r
+ 5c8:  97 f9           bld     r25, 7\r
+ 5ca:  9f 67           ori     r25, 0x7F       ; 127\r
+ 5cc:  80 e8           ldi     r24, 0x80       ; 128\r
+ 5ce:  70 e0           ldi     r23, 0x00       ; 0\r
+ 5d0:  60 e0           ldi     r22, 0x00       ; 0\r
+ 5d2:  08 95           ret\r
+\r
+000005d4 <__fp_nan>:\r
+ 5d4:  9f ef           ldi     r25, 0xFF       ; 255\r
+ 5d6:  80 ec           ldi     r24, 0xC0       ; 192\r
+ 5d8:  08 95           ret\r
+\r
+000005da <__fp_pscA>:\r
+ 5da:  00 24           eor     r0, r0\r
+ 5dc:  0a 94           dec     r0\r
+ 5de:  16 16           cp      r1, r22\r
+ 5e0:  17 06           cpc     r1, r23\r
+ 5e2:  18 06           cpc     r1, r24\r
+ 5e4:  09 06           cpc     r0, r25\r
+ 5e6:  08 95           ret\r
+\r
+000005e8 <__fp_pscB>:\r
+ 5e8:  00 24           eor     r0, r0\r
+ 5ea:  0a 94           dec     r0\r
+ 5ec:  12 16           cp      r1, r18\r
+ 5ee:  13 06           cpc     r1, r19\r
+ 5f0:  14 06           cpc     r1, r20\r
+ 5f2:  05 06           cpc     r0, r21\r
+ 5f4:  08 95           ret\r
+\r
+000005f6 <__fp_round>:\r
+ 5f6:  09 2e           mov     r0, r25\r
+ 5f8:  03 94           inc     r0\r
+ 5fa:  00 0c           add     r0, r0\r
+ 5fc:  11 f4           brne    .+4             ; 0x602 <__fp_round+0xc>\r
+ 5fe:  88 23           and     r24, r24\r
+ 600:  52 f0           brmi    .+20            ; 0x616 <__fp_round+0x20>\r
+ 602:  bb 0f           add     r27, r27\r
+ 604:  40 f4           brcc    .+16            ; 0x616 <__fp_round+0x20>\r
+ 606:  bf 2b           or      r27, r31\r
+ 608:  11 f4           brne    .+4             ; 0x60e <__fp_round+0x18>\r
+ 60a:  60 ff           sbrs    r22, 0\r
+ 60c:  04 c0           rjmp    .+8             ; 0x616 <__fp_round+0x20>\r
+ 60e:  6f 5f           subi    r22, 0xFF       ; 255\r
+ 610:  7f 4f           sbci    r23, 0xFF       ; 255\r
+ 612:  8f 4f           sbci    r24, 0xFF       ; 255\r
+ 614:  9f 4f           sbci    r25, 0xFF       ; 255\r
+ 616:  08 95           ret\r
+\r
+00000618 <__fp_split3>:\r
+ 618:  57 fd           sbrc    r21, 7\r
+ 61a:  90 58           subi    r25, 0x80       ; 128\r
+ 61c:  44 0f           add     r20, r20\r
+ 61e:  55 1f           adc     r21, r21\r
+ 620:  59 f0           breq    .+22            ; 0x638 <__fp_splitA+0x10>\r
+ 622:  5f 3f           cpi     r21, 0xFF       ; 255\r
+ 624:  71 f0           breq    .+28            ; 0x642 <__fp_splitA+0x1a>\r
+ 626:  47 95           ror     r20\r
+\r
+00000628 <__fp_splitA>:\r
+ 628:  88 0f           add     r24, r24\r
+ 62a:  97 fb           bst     r25, 7\r
+ 62c:  99 1f           adc     r25, r25\r
+ 62e:  61 f0           breq    .+24            ; 0x648 <__fp_splitA+0x20>\r
+ 630:  9f 3f           cpi     r25, 0xFF       ; 255\r
+ 632:  79 f0           breq    .+30            ; 0x652 <__fp_splitA+0x2a>\r
+ 634:  87 95           ror     r24\r
+ 636:  08 95           ret\r
+ 638:  12 16           cp      r1, r18\r
+ 63a:  13 06           cpc     r1, r19\r
+ 63c:  14 06           cpc     r1, r20\r
+ 63e:  55 1f           adc     r21, r21\r
+ 640:  f2 cf           rjmp    .-28            ; 0x626 <__fp_split3+0xe>\r
+ 642:  46 95           lsr     r20\r
+ 644:  f1 df           rcall   .-30            ; 0x628 <__fp_splitA>\r
+ 646:  08 c0           rjmp    .+16            ; 0x658 <__fp_splitA+0x30>\r
+ 648:  16 16           cp      r1, r22\r
+ 64a:  17 06           cpc     r1, r23\r
+ 64c:  18 06           cpc     r1, r24\r
+ 64e:  99 1f           adc     r25, r25\r
+ 650:  f1 cf           rjmp    .-30            ; 0x634 <__fp_splitA+0xc>\r
+ 652:  86 95           lsr     r24\r
+ 654:  71 05           cpc     r23, r1\r
+ 656:  61 05           cpc     r22, r1\r
+ 658:  08 94           sec\r
+ 65a:  08 95           ret\r
+\r
+0000065c <__fp_zero>:\r
+ 65c:  e8 94           clt\r
+\r
+0000065e <__fp_szero>:\r
+ 65e:  bb 27           eor     r27, r27\r
+ 660:  66 27           eor     r22, r22\r
+ 662:  77 27           eor     r23, r23\r
+ 664:  cb 01           movw    r24, r22\r
+ 666:  97 f9           bld     r25, 7\r
+ 668:  08 95           ret\r
+\r
+0000066a <__mulsf3>:\r
+ 66a:  0a d0           rcall   .+20            ; 0x680 <__mulsf3x>\r
+ 66c:  c4 cf           rjmp    .-120           ; 0x5f6 <__fp_round>\r
+ 66e:  b5 df           rcall   .-150           ; 0x5da <__fp_pscA>\r
+ 670:  28 f0           brcs    .+10            ; 0x67c <__mulsf3+0x12>\r
+ 672:  ba df           rcall   .-140           ; 0x5e8 <__fp_pscB>\r
+ 674:  18 f0           brcs    .+6             ; 0x67c <__mulsf3+0x12>\r
+ 676:  95 23           and     r25, r21\r
+ 678:  09 f0           breq    .+2             ; 0x67c <__mulsf3+0x12>\r
+ 67a:  a6 cf           rjmp    .-180           ; 0x5c8 <__fp_inf>\r
+ 67c:  ab cf           rjmp    .-170           ; 0x5d4 <__fp_nan>\r
+ 67e:  ef cf           rjmp    .-34            ; 0x65e <__fp_szero>\r
+\r
+00000680 <__mulsf3x>:\r
+ 680:  cb df           rcall   .-106           ; 0x618 <__fp_split3>\r
+ 682:  a8 f3           brcs    .-22            ; 0x66e <__mulsf3+0x4>\r
+\r
+00000684 <__mulsf3_pse>:\r
+ 684:  99 23           and     r25, r25\r
+ 686:  d9 f3           breq    .-10            ; 0x67e <__mulsf3+0x14>\r
+ 688:  55 23           and     r21, r21\r
+ 68a:  c9 f3           breq    .-14            ; 0x67e <__mulsf3+0x14>\r
+ 68c:  95 0f           add     r25, r21\r
+ 68e:  50 e0           ldi     r21, 0x00       ; 0\r
+ 690:  55 1f           adc     r21, r21\r
+ 692:  aa 27           eor     r26, r26\r
+ 694:  ee 27           eor     r30, r30\r
+ 696:  ff 27           eor     r31, r31\r
+ 698:  bb 27           eor     r27, r27\r
+ 69a:  00 24           eor     r0, r0\r
+ 69c:  08 94           sec\r
+ 69e:  67 95           ror     r22\r
+ 6a0:  20 f4           brcc    .+8             ; 0x6aa <__mulsf3_pse+0x26>\r
+ 6a2:  e2 0f           add     r30, r18\r
+ 6a4:  f3 1f           adc     r31, r19\r
+ 6a6:  b4 1f           adc     r27, r20\r
+ 6a8:  0a 1e           adc     r0, r26\r
+ 6aa:  22 0f           add     r18, r18\r
+ 6ac:  33 1f           adc     r19, r19\r
+ 6ae:  44 1f           adc     r20, r20\r
+ 6b0:  aa 1f           adc     r26, r26\r
+ 6b2:  66 95           lsr     r22\r
+ 6b4:  a9 f7           brne    .-22            ; 0x6a0 <__mulsf3_pse+0x1c>\r
+ 6b6:  77 95           ror     r23\r
+ 6b8:  30 f4           brcc    .+12            ; 0x6c6 <__mulsf3_pse+0x42>\r
+ 6ba:  f3 0f           add     r31, r19\r
+ 6bc:  b4 1f           adc     r27, r20\r
+ 6be:  0a 1e           adc     r0, r26\r
+ 6c0:  12 1e           adc     r1, r18\r
+ 6c2:  08 f4           brcc    .+2             ; 0x6c6 <__mulsf3_pse+0x42>\r
+ 6c4:  63 95           inc     r22\r
+ 6c6:  33 0f           add     r19, r19\r
+ 6c8:  44 1f           adc     r20, r20\r
+ 6ca:  aa 1f           adc     r26, r26\r
+ 6cc:  22 1f           adc     r18, r18\r
+ 6ce:  76 95           lsr     r23\r
+ 6d0:  99 f7           brne    .-26            ; 0x6b8 <__mulsf3_pse+0x34>\r
+ 6d2:  87 95           ror     r24\r
+ 6d4:  20 f4           brcc    .+8             ; 0x6de <__mulsf3_pse+0x5a>\r
+ 6d6:  b4 0f           add     r27, r20\r
+ 6d8:  0a 1e           adc     r0, r26\r
+ 6da:  12 1e           adc     r1, r18\r
+ 6dc:  63 1f           adc     r22, r19\r
+ 6de:  44 0f           add     r20, r20\r
+ 6e0:  aa 1f           adc     r26, r26\r
+ 6e2:  22 1f           adc     r18, r18\r
+ 6e4:  33 1f           adc     r19, r19\r
+ 6e6:  86 95           lsr     r24\r
+ 6e8:  a9 f7           brne    .-22            ; 0x6d4 <__mulsf3_pse+0x50>\r
+ 6ea:  86 2f           mov     r24, r22\r
+ 6ec:  71 2d           mov     r23, r1\r
+ 6ee:  60 2d           mov     r22, r0\r
+ 6f0:  11 24           eor     r1, r1\r
+ 6f2:  9f 57           subi    r25, 0x7F       ; 127\r
+ 6f4:  50 40           sbci    r21, 0x00       ; 0\r
+ 6f6:  8a f0           brmi    .+34            ; 0x71a <__mulsf3_pse+0x96>\r
+ 6f8:  e1 f0           breq    .+56            ; 0x732 <__mulsf3_pse+0xae>\r
+ 6fa:  88 23           and     r24, r24\r
+ 6fc:  4a f0           brmi    .+18            ; 0x710 <__mulsf3_pse+0x8c>\r
+ 6fe:  ee 0f           add     r30, r30\r
+ 700:  ff 1f           adc     r31, r31\r
+ 702:  bb 1f           adc     r27, r27\r
+ 704:  66 1f           adc     r22, r22\r
+ 706:  77 1f           adc     r23, r23\r
+ 708:  88 1f           adc     r24, r24\r
+ 70a:  91 50           subi    r25, 0x01       ; 1\r
+ 70c:  50 40           sbci    r21, 0x00       ; 0\r
+ 70e:  a9 f7           brne    .-22            ; 0x6fa <__mulsf3_pse+0x76>\r
+ 710:  9e 3f           cpi     r25, 0xFE       ; 254\r
+ 712:  51 05           cpc     r21, r1\r
+ 714:  70 f0           brcs    .+28            ; 0x732 <__mulsf3_pse+0xae>\r
+ 716:  58 cf           rjmp    .-336           ; 0x5c8 <__fp_inf>\r
+ 718:  a2 cf           rjmp    .-188           ; 0x65e <__fp_szero>\r
+ 71a:  5f 3f           cpi     r21, 0xFF       ; 255\r
+ 71c:  ec f3           brlt    .-6             ; 0x718 <__mulsf3_pse+0x94>\r
+ 71e:  98 3e           cpi     r25, 0xE8       ; 232\r
+ 720:  dc f3           brlt    .-10            ; 0x718 <__mulsf3_pse+0x94>\r
+ 722:  86 95           lsr     r24\r
+ 724:  77 95           ror     r23\r
+ 726:  67 95           ror     r22\r
+ 728:  b7 95           ror     r27\r
+ 72a:  f7 95           ror     r31\r
+ 72c:  e7 95           ror     r30\r
+ 72e:  9f 5f           subi    r25, 0xFF       ; 255\r
+ 730:  c1 f7           brne    .-16            ; 0x722 <__mulsf3_pse+0x9e>\r
+ 732:  fe 2b           or      r31, r30\r
+ 734:  88 0f           add     r24, r24\r
+ 736:  91 1d           adc     r25, r1\r
+ 738:  96 95           lsr     r25\r
+ 73a:  87 95           ror     r24\r
+ 73c:  97 f9           bld     r25, 7\r
+ 73e:  08 95           ret\r
+\r
+00000740 <_exit>:\r
+ 740:  f8 94           cli\r
+\r
+00000742 <__stop_program>:\r
+ 742:  ff cf           rjmp    .-2             ; 0x742 <__stop_program>\r

diff --git a/firmware/Debug/dynamit.map b/firmware/Debug/dynamit.map
new file mode 100644 (file)
index 0000000..220f258
--- /dev/null
+++ b/firmware/Debug/dynamit.map
@@ -0,0 +1,606 @@
+Archive member included to satisfy reference by file (symbol)\r
+\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3.o)\r
+                              main.o (__subsf3)\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o)\r
+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3.o) (__addsf3x)\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(divsf3.o)\r
+                              main.o (__divsf3)\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(divsf3x.o)\r
+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(divsf3.o) (__divsf3x)\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(fixunssfsi.o)\r
+                              main.o (__fixunssfsi)\r
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+ .debug_line    0x00000000      0x101 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny2313/avr25/tiny-stack/crtattiny2313.o\r
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+ .debug_str     0x00000163      0x211 main.o\r
+                                0x24c (size before relaxing)\r
+\r
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+ *(.debug_ranges)\r
+ .debug_ranges  0x00000000       0x40 main.o\r
+\r
+.debug_macro\r
+ *(.debug_macro)\r
+OUTPUT(dynamit.elf elf32-avr)\r
+LOAD linker stubs\r

diff --git a/firmware/Debug/dynamit.srec b/firmware/Debug/dynamit.srec
new file mode 100644 (file)
index 0000000..b238361
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diff --git a/firmware/Debug/main.d b/firmware/Debug/main.d
new file mode 100644 (file)
index 0000000..0943a1d
--- /dev/null
+++ b/firmware/Debug/main.d
@@ -0,0 +1,46 @@
+main.d main.o: .././main.c \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h \\r
+ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include/avr/iotn2313.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h:\r
+\r
+C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include/avr/iotn2313.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h:\r

diff --git a/firmware/Debug/main.o b/firmware/Debug/main.o
new file mode 100644 (file)
index 0000000..bc253c4
Binary files /dev/null and b/firmware/Debug/main.o differ

diff --git a/firmware/Debug/makedep.mk b/firmware/Debug/makedep.mk
new file mode 100644 (file)
index 0000000..2925510
--- /dev/null
+++ b/firmware/Debug/makedep.mk
@@ -0,0 +1,6 @@
+################################################################################\r
+# Automatically-generated file. Do not edit or delete the file\r
+################################################################################\r
+\r
+main.c\r
+\r

diff --git a/firmware/Release/Makefile b/firmware/Release/Makefile
new file mode 100644 (file)
index 0000000..3606931
--- /dev/null
+++ b/firmware/Release/Makefile
@@ -0,0 +1,127 @@
+################################################################################\r
+# Automatically-generated file. Do not edit!\r
+################################################################################\r
+\r
+SHELL := cmd.exe\r
+RM := rm -rf\r
+\r
+USER_OBJS :=\r
+\r
+LIBS := \r
+PROJ := \r
+\r
+O_SRCS := \r
+C_SRCS := \r
+S_SRCS := \r
+S_UPPER_SRCS := \r
+OBJ_SRCS := \r
+ASM_SRCS := \r
+PREPROCESSING_SRCS := \r
+OBJS := \r
+OBJS_AS_ARGS := \r
+C_DEPS := \r
+C_DEPS_AS_ARGS := \r
+EXECUTABLES := \r
+OUTPUT_FILE_PATH :=\r
+OUTPUT_FILE_PATH_AS_ARGS :=\r
+AVR_APP_PATH :=$$$AVR_APP_PATH$$$\r
+QUOTE := "\r
+ADDITIONAL_DEPENDENCIES:=\r
+OUTPUT_FILE_DEP:=\r
+LIB_DEP:=\r
+LINKER_SCRIPT_DEP:=\r
+\r
+# Every subdirectory with source files must be described here\r
+SUBDIRS := \r
+\r
+\r
+# Add inputs and outputs from these tool invocations to the build variables \r
+C_SRCS +=  \\r
+../main.c\r
+\r
+\r
+PREPROCESSING_SRCS += \r
+\r
+\r
+ASM_SRCS += \r
+\r
+\r
+OBJS +=  \\r
+main.o\r
+\r
+OBJS_AS_ARGS +=  \\r
+main.o\r
+\r
+C_DEPS +=  \\r
+main.d\r
+\r
+C_DEPS_AS_ARGS +=  \\r
+main.d\r
+\r
+OUTPUT_FILE_PATH +=dynamit.elf\r
+\r
+OUTPUT_FILE_PATH_AS_ARGS +=dynamit.elf\r
+\r
+ADDITIONAL_DEPENDENCIES:=\r
+\r
+OUTPUT_FILE_DEP:= ./makedep.mk\r
+\r
+LIB_DEP+= \r
+\r
+LINKER_SCRIPT_DEP+= \r
+\r
+\r
+# AVR32/GNU C Compiler\r
+./main.o: .././main.c\r
+       @echo Building file: $<\r
+       @echo Invoking: AVR/GNU C Compiler : 5.4.0\r
+       $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE)  -x c -funsigned-char -funsigned-bitfields -DNDEBUG  -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include"  -Os -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -Wall -mmcu=attiny2313 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)"   -o "$@" "$<" \r
+       @echo Finished building: $<\r
+       \r
+\r
+\r
+\r
+\r
+# AVR32/GNU Preprocessing Assembler\r
+\r
+\r
+\r
+# AVR32/GNU Assembler\r
+\r
+\r
+\r
+\r
+ifneq ($(MAKECMDGOALS),clean)\r
+ifneq ($(strip $(C_DEPS)),)\r
+-include $(C_DEPS)\r
+endif\r
+endif\r
+\r
+# Add inputs and outputs from these tool invocations to the build variables \r
+\r
+# All Target\r
+all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES)\r
+\r
+$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP)\r
+       @echo Building target: $@\r
+       @echo Invoking: AVR/GNU Linker : 5.4.0\r
+       $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="dynamit.map" -Wl,--start-group -Wl,-lm  -Wl,--end-group -Wl,--gc-sections -mmcu=attiny2313 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313"  \r
+       @echo Finished building target: $@\r
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures  "dynamit.elf" "dynamit.hex"
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom  --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0  --no-change-warnings -O ihex "dynamit.elf" "dynamit.eep" || exit 0
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "dynamit.elf" > "dynamit.lss"
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "dynamit.elf" "dynamit.srec"
+       "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "dynamit.elf"
+       \r
+       \r
+\r
+\r
+\r
+\r
+\r
+# Other Targets\r
+clean:\r
+       -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES)  \r
+       -$(RM) $(C_DEPS_AS_ARGS)   \r
+       rm -rf "dynamit.elf" "dynamit.a" "dynamit.hex" "dynamit.lss" "dynamit.eep" "dynamit.map" "dynamit.srec" "dynamit.usersignatures"
+       
\ No newline at end of file

diff --git a/firmware/Release/dynamit.eep b/firmware/Release/dynamit.eep
new file mode 100644 (file)
index 0000000..1996e8f
--- /dev/null
+++ b/firmware/Release/dynamit.eep
@@ -0,0 +1 @@
+:00000001FF\r

diff --git a/firmware/Release/dynamit.elf b/firmware/Release/dynamit.elf
new file mode 100644 (file)
index 0000000..5e1c648
Binary files /dev/null and b/firmware/Release/dynamit.elf differ

diff --git a/firmware/Release/dynamit.hex b/firmware/Release/dynamit.hex
new file mode 100644 (file)
index 0000000..ca5ee61
--- /dev/null
+++ b/firmware/Release/dynamit.hex
@@ -0,0 +1,119 @@
+:1000000012C02AC029C028C027C026C025C024C0CD\r
+:1000100023C022C021C020C020C0ECC01DC01CC015\r
+:100020001BC01AC019C011241FBECFEDCDBF10E0F8\r
+:10003000A0E6B0E0E6E3F7E002C005900D92A83735\r
+:10004000B107D9F720E0A8E7B0E001C01D92AB37B7\r
+:10005000B207E1F77ED06DC3D3CF1F920F920FB6D8\r
+:100060000F9211248F939F9398B380E1892788BBC7\r
+:100070009F918F910F900FBE0F901F90189527E0C2\r
+:1000800030E0482F50E080E1BA01022E02C07595A1\r
+:1000900067950A94E2F760FF02C0929A01C09298B5\r
+:1000A00092B3982792BB92B3982792BB2150310903\r
+:1000B00058F708951F93CF93DF93142FF894EC0112\r
+:1000C000CC0FDD1FCF59DF4F89818623D8DF888190\r
+:1000D0008123D5DF92B388E0982792BB92B389271A\r
+:1000E00082BB7894DF91CF911F9108958EB5887F60\r
+:1000F0008EBD88B388BB0895F894803127E29207BB\r
+:1001000008F0F4CFBC0180E090E01AD220E030E0AB\r
+:1001100042E852E4A3D29B01AC0168E27BE68EE6A2\r
+:100120009EE47AD120E030E040E05FE397D2DCD17A\r
+:100130007BBD6ABD6AB57BB580E090E001D225EC5D\r
+:100140003EE440E454E403D1CFD179BD68BD789456\r
+:100150000895F89480B7826080BF89B7816089BFB5\r
+:100160008AE586BF8FB583608FBD8EB580618EBDF9\r
+:1001700089B7806289BF8CE181BB80E187BB12BAFD\r
+:100180007894B19B13C080917A0047EF6FEB90E0B9\r
+:1001900091DF809160004FEF6FE790E08BDF8091FF\r
+:1001A00079004FEF6FED90E085DFEBCF83B785608F\r
+:1001B00083BF88EC90E0A0DF8EB583608EBD809118\r
+:1001C0007800882321F080917A004FEF03C080915E\r
+:1001D0007A0047EF6FEB90E06DDF809160004FEFAA\r
+:1001E0006FE790E067DF809179004FEF6FED90E06F\r
+:1001F00061DFE5CF1F920F920FB60F921124CF92BD\r
+:10020000DF92EF92FF922F933F934F935F936F9301\r
+:100210007F938F939F93AF93BF93CF93EF93FF936E\r
+:100220008091780080FF09C08AE08093600080930D\r
+:100230007A008093790082E00CC08091780081FF81\r
+:100240000BC018BA1092600010927A0010927900D8\r
+:1002500081E08093780065C060916000C0917A0071\r
+:1002600070E080E090E06ED120E030E040E251E4C8\r
+:10027000F5D16B017C016C2F70E080E090E062D1E1\r
+:100280009B01AC01C701B60163D02DEC3CEC4CECFA\r
+:100290005DE35ED09B01AC0160E070E88BE396E427\r
+:1002A000BBD022D1CB0128DF80916000811114C026\r
+:1002B00080917A00811110C080917900882361F0CB\r
+:1002C0001092600010927A001092790081E0809381\r
+:1002D000780084EC86BF25C080917A0081110FC020\r
+:1002E0008091790081110BC089E080937A0080931E\r
+:1002F00079008091600081508093600012C08091ED\r
+:100300007900811109C089E08093790080917A0099\r
+:10031000815080937A0005C080917900815080934C\r
+:100320007900FF91EF91CF91BF91AF919F918F9104\r
+:100330007F916F915F914F913F912F91FF90EF903F\r
+:10034000DF90CF900F900FBE0F901F9018955058D0\r
+:10035000BB27AA270ED048C139D130F03ED120F0BA\r
+:1003600031F49F3F11F41EF42EC10EF4E095E7FB2B\r
+:1003700024C1E92F4AD180F3BA17620773078407B3\r
+:10038000950718F071F49EF562C10EF4E0950B2EFE\r
+:10039000BA2FA02D0B01B90190010C01CA01A001D7\r
+:1003A0001124FF27591B99F0593F50F4503E68F132\r
+:1003B0001A16F040A22F232F342F4427585FF3CF73\r
+:1003C000469537952795A795F0405395C9F77EF444\r
+:1003D0001F16BA0B620B730B840BBAF09150A1F08D\r
+:1003E000FF0FBB1F661F771F881FC2F70EC0BA0F13\r
+:1003F000621F731F841F48F4879577956795B7959B\r
+:10040000F7959E3F08F0B3CF9395880F08F0992792\r
+:10041000EE0F9795879508950CD0E6C0DED040F09A\r
+:10042000D5D030F021F45F3F19F0C7C0511110C191\r
+:10043000CAC0EBD098F39923C9F35523B1F3951BA8\r
+:10044000550BBB27AA2762177307840738F09F5FF5\r
+:100450005F4F220F331F441FAA1FA9F333D00E2E64\r
+:100460003AF0E0E830D091505040E695001CCAF7D1\r
+:1004700029D0FE2F27D0660F771F881FBB1F261796\r
+:1004800037074807AB07B0E809F0BB0B802DBF0169\r
+:10049000FF2793585F4F2AF09E3F510568F08DC0AB\r
+:1004A000D7C05F3FECF3983EDCF386957795679570\r
+:1004B000B795F7959F5FC9F7880F911D969587951A\r
+:1004C00097F90895E1E0660F771F881FBB1F621739\r
+:1004D00073078407BA0720F0621B730B840BBA0BF7\r
+:1004E000EE1F88F7E095089598D088F09F5790F018\r
+:1004F000B92F9927B751A0F0D1F0660F771F881F49\r
+:10050000991F1AF0BA95C9F712C0B13081F09FD087\r
+:10051000B1E008959CC0672F782F8827B85F39F025\r
+:10052000B93FCCF3869577956795B395D9F73EF4A7\r
+:1005300090958095709561957F4F8F4F9F4F08954F\r
+:10054000E89409C097FB3EF490958095709561956D\r
+:100550007F4F8F4F9F4F9923A9F0F92F96E9BB2723\r
+:100560009395F695879577956795B795F111F8CF9F\r
+:10057000FAF4BB0F11F460FF1BC06F5F7F4F8F4F0A\r
+:100580009F4F16C0882311F096E911C0772321F000\r
+:100590009EE8872F762F05C0662371F096E8862F98\r
+:1005A00070E060E02AF09A95660F771F881FDAF7EF\r
+:1005B000880F9695879597F9089597F99F6780E832\r
+:1005C00070E060E008959FEF80EC089500240A94A5\r
+:1005D0001616170618060906089500240A9412161E\r
+:1005E0001306140605060895092E0394000C11F451\r
+:1005F000882352F0BB0F40F4BF2B11F460FF04C0FE\r
+:100600006F5F7F4F8F4F9F4F089557FD9058440F56\r
+:10061000551F59F05F3F71F04795880F97FB991F61\r
+:1006200061F09F3F79F0879508951216130614061E\r
+:10063000551FF2CF4695F1DF08C0161617061806AB\r
+:10064000991FF1CF86957105610508940895E89486\r
+:10065000BB2766277727CB0197F908950AD0C4CF27\r
+:10066000B5DF28F0BADF18F0952309F0A6CFABCF9D\r
+:10067000EFCFCBDFA8F39923D9F35523C9F3950F17\r
+:1006800050E0551FAA27EE27FF27BB270024089418\r
+:10069000679520F4E20FF31FB41F0A1E220F331FC9\r
+:1006A000441FAA1F6695A9F7779530F4F30FB41F7E\r
+:1006B0000A1E121E08F46395330F441FAA1F221F3F\r
+:1006C000769599F7879520F4B40F0A1E121E631FC2\r
+:1006D000440FAA1F221F331F8695A9F7862F712D5D\r
+:1006E000602D11249F5750408AF0E1F088234AF092\r
+:1006F000EE0FFF1FBB1F661F771F881F91505040D2\r
+:10070000A9F79E3F510570F058CFA2CF5F3FECF3A1\r
+:10071000983EDCF3869577956795B795F795E795BD\r
+:100720009F5FC1F7FE2B880F911D9695879597F9CE\r
+:060730000895F894FFCFCC\r
+:1007360006E9E3EFEFD9EBCBEBCFE7CBF3C9F3EF6A\r
+:08074600EBC9E3CBE3FFFF0068\r
+:00000001FF\r

diff --git a/firmware/Release/dynamit.lss b/firmware/Release/dynamit.lss
new file mode 100644 (file)
index 0000000..c012047
--- /dev/null
+++ b/firmware/Release/dynamit.lss
@@ -0,0 +1,984 @@
+\r
+dynamit.elf:     file format elf32-avr\r
+\r
+Sections:\r
+Idx Name          Size      VMA       LMA       File off  Algn\r
+  0 .text         00000736  00000000  00000000  00000094  2**1\r
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE\r
+  1 .data         00000018  00800060  00000736  000007ca  2**0\r
+                  CONTENTS, ALLOC, LOAD, DATA\r
+  2 .bss          00000003  00800078  00800078  000007e2  2**0\r
+                  ALLOC\r
+  3 .comment      00000030  00000000  00000000  000007e2  2**0\r
+                  CONTENTS, READONLY\r
+  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  00000814  2**2\r
+                  CONTENTS, READONLY\r
+  5 .debug_info   0000040e  00000000  00000000  00000854  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+  6 .debug_abbrev 000003d7  00000000  00000000  00000c62  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+  7 .debug_line   00000101  00000000  00000000  00001039  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+  8 .debug_str    00000163  00000000  00000000  0000113a  2**0\r
+                  CONTENTS, READONLY, DEBUGGING\r
+\r
+Disassembly of section .text:\r
+\r
+00000000 <__vectors>:\r
+   0:  12 c0           rjmp    .+36            ; 0x26 <__ctors_end>\r
+   2:  2a c0           rjmp    .+84            ; 0x58 <__bad_interrupt>\r
+   4:  29 c0           rjmp    .+82            ; 0x58 <__bad_interrupt>\r
+   6:  28 c0           rjmp    .+80            ; 0x58 <__bad_interrupt>\r
+   8:  27 c0           rjmp    .+78            ; 0x58 <__bad_interrupt>\r
+   a:  26 c0           rjmp    .+76            ; 0x58 <__bad_interrupt>\r
+   c:  25 c0           rjmp    .+74            ; 0x58 <__bad_interrupt>\r
+   e:  24 c0           rjmp    .+72            ; 0x58 <__bad_interrupt>\r
+  10:  23 c0           rjmp    .+70            ; 0x58 <__bad_interrupt>\r
+  12:  22 c0           rjmp    .+68            ; 0x58 <__bad_interrupt>\r
+  14:  21 c0           rjmp    .+66            ; 0x58 <__bad_interrupt>\r
+  16:  20 c0           rjmp    .+64            ; 0x58 <__bad_interrupt>\r
+  18:  20 c0           rjmp    .+64            ; 0x5a <__vector_12>\r
+  1a:  ec c0           rjmp    .+472           ; 0x1f4 <__vector_13>\r
+  1c:  1d c0           rjmp    .+58            ; 0x58 <__bad_interrupt>\r
+  1e:  1c c0           rjmp    .+56            ; 0x58 <__bad_interrupt>\r
+  20:  1b c0           rjmp    .+54            ; 0x58 <__bad_interrupt>\r
+  22:  1a c0           rjmp    .+52            ; 0x58 <__bad_interrupt>\r
+  24:  19 c0           rjmp    .+50            ; 0x58 <__bad_interrupt>\r
+\r
+00000026 <__ctors_end>:\r
+  26:  11 24           eor     r1, r1\r
+  28:  1f be           out     0x3f, r1        ; 63\r
+  2a:  cf ed           ldi     r28, 0xDF       ; 223\r
+  2c:  cd bf           out     0x3d, r28       ; 61\r
+\r
+0000002e <__do_copy_data>:\r
+  2e:  10 e0           ldi     r17, 0x00       ; 0\r
+  30:  a0 e6           ldi     r26, 0x60       ; 96\r
+  32:  b0 e0           ldi     r27, 0x00       ; 0\r
+  34:  e6 e3           ldi     r30, 0x36       ; 54\r
+  36:  f7 e0           ldi     r31, 0x07       ; 7\r
+  38:  02 c0           rjmp    .+4             ; 0x3e <__SP_L__+0x1>\r
+  3a:  05 90           lpm     r0, Z+\r
+  3c:  0d 92           st      X+, r0\r
+  3e:  a8 37           cpi     r26, 0x78       ; 120\r
+  40:  b1 07           cpc     r27, r17\r
+  42:  d9 f7           brne    .-10            ; 0x3a <__do_copy_data+0xc>\r
+\r
+00000044 <__do_clear_bss>:\r
+  44:  20 e0           ldi     r18, 0x00       ; 0\r
+  46:  a8 e7           ldi     r26, 0x78       ; 120\r
+  48:  b0 e0           ldi     r27, 0x00       ; 0\r
+  4a:  01 c0           rjmp    .+2             ; 0x4e <.do_clear_bss_start>\r
+\r
+0000004c <.do_clear_bss_loop>:\r
+  4c:  1d 92           st      X+, r1\r
+\r
+0000004e <.do_clear_bss_start>:\r
+  4e:  ab 37           cpi     r26, 0x7B       ; 123\r
+  50:  b2 07           cpc     r27, r18\r
+  52:  e1 f7           brne    .-8             ; 0x4c <.do_clear_bss_loop>\r
+  54:  7e d0           rcall   .+252           ; 0x152 <main>\r
+  56:  6d c3           rjmp    .+1754          ; 0x732 <_exit>\r
+\r
+00000058 <__bad_interrupt>:\r
+  58:  d3 cf           rjmp    .-90            ; 0x0 <__vectors>\r
+\r
+0000005a <__vector_12>:\r
+  5a:  1f 92           push    r1\r
+  5c:  0f 92           push    r0\r
+  5e:  0f b6           in      r0, 0x3f        ; 63\r
+  60:  0f 92           push    r0\r
+  62:  11 24           eor     r1, r1\r
+  64:  8f 93           push    r24\r
+  66:  9f 93           push    r25\r
+  68:  98 b3           in      r25, 0x18       ; 24\r
+  6a:  80 e1           ldi     r24, 0x10       ; 16\r
+  6c:  89 27           eor     r24, r25\r
+  6e:  88 bb           out     0x18, r24       ; 24\r
+  70:  9f 91           pop     r25\r
+  72:  8f 91           pop     r24\r
+  74:  0f 90           pop     r0\r
+  76:  0f be           out     0x3f, r0        ; 63\r
+  78:  0f 90           pop     r0\r
+  7a:  1f 90           pop     r1\r
+  7c:  18 95           reti\r
+\r
+0000007e <shift_out_msb>:\r
+  7e:  27 e0           ldi     r18, 0x07       ; 7\r
+  80:  30 e0           ldi     r19, 0x00       ; 0\r
+  82:  48 2f           mov     r20, r24\r
+  84:  50 e0           ldi     r21, 0x00       ; 0\r
+  86:  80 e1           ldi     r24, 0x10       ; 16\r
+  88:  ba 01           movw    r22, r20\r
+  8a:  02 2e           mov     r0, r18\r
+  8c:  02 c0           rjmp    .+4             ; 0x92 <__DATA_REGION_LENGTH__+0x12>\r
+  8e:  75 95           asr     r23\r
+  90:  67 95           ror     r22\r
+  92:  0a 94           dec     r0\r
+  94:  e2 f7           brpl    .-8             ; 0x8e <__DATA_REGION_LENGTH__+0xe>\r
+  96:  60 ff           sbrs    r22, 0\r
+  98:  02 c0           rjmp    .+4             ; 0x9e <__DATA_REGION_LENGTH__+0x1e>\r
+  9a:  92 9a           sbi     0x12, 2 ; 18\r
+  9c:  01 c0           rjmp    .+2             ; 0xa0 <__DATA_REGION_LENGTH__+0x20>\r
+  9e:  92 98           cbi     0x12, 2 ; 18\r
+  a0:  92 b3           in      r25, 0x12       ; 18\r
+  a2:  98 27           eor     r25, r24\r
+  a4:  92 bb           out     0x12, r25       ; 18\r
+  a6:  92 b3           in      r25, 0x12       ; 18\r
+  a8:  98 27           eor     r25, r24\r
+  aa:  92 bb           out     0x12, r25       ; 18\r
+  ac:  21 50           subi    r18, 0x01       ; 1\r
+  ae:  31 09           sbc     r19, r1\r
+  b0:  58 f7           brcc    .-42            ; 0x88 <__DATA_REGION_LENGTH__+0x8>\r
+  b2:  08 95           ret\r
+\r
+000000b4 <display_num_msb>:\r
+  b4:  1f 93           push    r17\r
+  b6:  cf 93           push    r28\r
+  b8:  df 93           push    r29\r
+  ba:  14 2f           mov     r17, r20\r
+  bc:  f8 94           cli\r
+  be:  ec 01           movw    r28, r24\r
+  c0:  cc 0f           add     r28, r28\r
+  c2:  dd 1f           adc     r29, r29\r
+  c4:  cf 59           subi    r28, 0x9F       ; 159\r
+  c6:  df 4f           sbci    r29, 0xFF       ; 255\r
+  c8:  89 81           ldd     r24, Y+1        ; 0x01\r
+  ca:  86 23           and     r24, r22\r
+  cc:  d8 df           rcall   .-80            ; 0x7e <shift_out_msb>\r
+  ce:  88 81           ld      r24, Y\r
+  d0:  81 23           and     r24, r17\r
+  d2:  d5 df           rcall   .-86            ; 0x7e <shift_out_msb>\r
+  d4:  92 b3           in      r25, 0x12       ; 18\r
+  d6:  88 e0           ldi     r24, 0x08       ; 8\r
+  d8:  98 27           eor     r25, r24\r
+  da:  92 bb           out     0x12, r25       ; 18\r
+  dc:  92 b3           in      r25, 0x12       ; 18\r
+  de:  89 27           eor     r24, r25\r
+  e0:  82 bb           out     0x12, r24       ; 18\r
+  e2:  78 94           sei\r
+  e4:  df 91           pop     r29\r
+  e6:  cf 91           pop     r28\r
+  e8:  1f 91           pop     r17\r
+  ea:  08 95           ret\r
+\r
+000000ec <turn_off_beep>:\r
+  ec:  8e b5           in      r24, 0x2e       ; 46\r
+  ee:  88 7f           andi    r24, 0xF8       ; 248\r
+  f0:  8e bd           out     0x2e, r24       ; 46\r
+  f2:  88 b3           in      r24, 0x18       ; 24\r
+  f4:  88 bb           out     0x18, r24       ; 24\r
+  f6:  08 95           ret\r
+\r
+000000f8 <set_beep_freq>:\r
+  f8:  f8 94           cli\r
+  fa:  80 31           cpi     r24, 0x10       ; 16\r
+  fc:  27 e2           ldi     r18, 0x27       ; 39\r
+  fe:  92 07           cpc     r25, r18\r
+ 100:  08 f0           brcs    .+2             ; 0x104 <set_beep_freq+0xc>\r
+ 102:  f4 cf           rjmp    .-24            ; 0xec <turn_off_beep>\r
+ 104:  bc 01           movw    r22, r24\r
+ 106:  80 e0           ldi     r24, 0x00       ; 0\r
+ 108:  90 e0           ldi     r25, 0x00       ; 0\r
+ 10a:  1a d2           rcall   .+1076          ; 0x540 <__floatunsisf>\r
+ 10c:  20 e0           ldi     r18, 0x00       ; 0\r
+ 10e:  30 e0           ldi     r19, 0x00       ; 0\r
+ 110:  42 e8           ldi     r20, 0x82       ; 130\r
+ 112:  52 e4           ldi     r21, 0x42       ; 66\r
+ 114:  a3 d2           rcall   .+1350          ; 0x65c <__mulsf3>\r
+ 116:  9b 01           movw    r18, r22\r
+ 118:  ac 01           movw    r20, r24\r
+ 11a:  68 e2           ldi     r22, 0x28       ; 40\r
+ 11c:  7b e6           ldi     r23, 0x6B       ; 107\r
+ 11e:  8e e6           ldi     r24, 0x6E       ; 110\r
+ 120:  9e e4           ldi     r25, 0x4E       ; 78\r
+ 122:  7a d1           rcall   .+756           ; 0x418 <__divsf3>\r
+ 124:  20 e0           ldi     r18, 0x00       ; 0\r
+ 126:  30 e0           ldi     r19, 0x00       ; 0\r
+ 128:  40 e0           ldi     r20, 0x00       ; 0\r
+ 12a:  5f e3           ldi     r21, 0x3F       ; 63\r
+ 12c:  97 d2           rcall   .+1326          ; 0x65c <__mulsf3>\r
+ 12e:  dc d1           rcall   .+952           ; 0x4e8 <__fixunssfsi>\r
+ 130:  7b bd           out     0x2b, r23       ; 43\r
+ 132:  6a bd           out     0x2a, r22       ; 42\r
+ 134:  6a b5           in      r22, 0x2a       ; 42\r
+ 136:  7b b5           in      r23, 0x2b       ; 43\r
+ 138:  80 e0           ldi     r24, 0x00       ; 0\r
+ 13a:  90 e0           ldi     r25, 0x00       ; 0\r
+ 13c:  01 d2           rcall   .+1026          ; 0x540 <__floatunsisf>\r
+ 13e:  25 ec           ldi     r18, 0xC5       ; 197\r
+ 140:  3e e4           ldi     r19, 0x4E       ; 78\r
+ 142:  40 e4           ldi     r20, 0x40       ; 64\r
+ 144:  54 e4           ldi     r21, 0x44       ; 68\r
+ 146:  03 d1           rcall   .+518           ; 0x34e <__subsf3>\r
+ 148:  cf d1           rcall   .+926           ; 0x4e8 <__fixunssfsi>\r
+ 14a:  79 bd           out     0x29, r23       ; 41\r
+ 14c:  68 bd           out     0x28, r22       ; 40\r
+ 14e:  78 94           sei\r
+ 150:  08 95           ret\r
+\r
+00000152 <main>:\r
+ 152:  f8 94           cli\r
+ 154:  80 b7           in      r24, 0x30       ; 48\r
+ 156:  82 60           ori     r24, 0x02       ; 2\r
+ 158:  80 bf           out     0x30, r24       ; 48\r
+ 15a:  89 b7           in      r24, 0x39       ; 57\r
+ 15c:  81 60           ori     r24, 0x01       ; 1\r
+ 15e:  89 bf           out     0x39, r24       ; 57\r
+ 160:  8a e5           ldi     r24, 0x5A       ; 90\r
+ 162:  86 bf           out     0x36, r24       ; 54\r
+ 164:  8f b5           in      r24, 0x2f       ; 47\r
+ 166:  83 60           ori     r24, 0x03       ; 3\r
+ 168:  8f bd           out     0x2f, r24       ; 47\r
+ 16a:  8e b5           in      r24, 0x2e       ; 46\r
+ 16c:  80 61           ori     r24, 0x10       ; 16\r
+ 16e:  8e bd           out     0x2e, r24       ; 46\r
+ 170:  89 b7           in      r24, 0x39       ; 57\r
+ 172:  80 62           ori     r24, 0x20       ; 32\r
+ 174:  89 bf           out     0x39, r24       ; 57\r
+ 176:  8c e1           ldi     r24, 0x1C       ; 28\r
+ 178:  81 bb           out     0x11, r24       ; 17\r
+ 17a:  80 e1           ldi     r24, 0x10       ; 16\r
+ 17c:  87 bb           out     0x17, r24       ; 23\r
+ 17e:  12 ba           out     0x12, r1        ; 18\r
+ 180:  78 94           sei\r
+ 182:  b1 9b           sbis    0x16, 1 ; 22\r
+ 184:  13 c0           rjmp    .+38            ; 0x1ac <main+0x5a>\r
+ 186:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 18a:  47 ef           ldi     r20, 0xF7       ; 247\r
+ 18c:  6f eb           ldi     r22, 0xBF       ; 191\r
+ 18e:  90 e0           ldi     r25, 0x00       ; 0\r
+ 190:  91 df           rcall   .-222           ; 0xb4 <display_num_msb>\r
+ 192:  80 91 60 00     lds     r24, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 196:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 198:  6f e7           ldi     r22, 0x7F       ; 127\r
+ 19a:  90 e0           ldi     r25, 0x00       ; 0\r
+ 19c:  8b df           rcall   .-234           ; 0xb4 <display_num_msb>\r
+ 19e:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 1a2:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 1a4:  6f ed           ldi     r22, 0xDF       ; 223\r
+ 1a6:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1a8:  85 df           rcall   .-246           ; 0xb4 <display_num_msb>\r
+ 1aa:  eb cf           rjmp    .-42            ; 0x182 <main+0x30>\r
+ 1ac:  83 b7           in      r24, 0x33       ; 51\r
+ 1ae:  85 60           ori     r24, 0x05       ; 5\r
+ 1b0:  83 bf           out     0x33, r24       ; 51\r
+ 1b2:  88 ec           ldi     r24, 0xC8       ; 200\r
+ 1b4:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1b6:  a0 df           rcall   .-192           ; 0xf8 <set_beep_freq>\r
+ 1b8:  8e b5           in      r24, 0x2e       ; 46\r
+ 1ba:  83 60           ori     r24, 0x03       ; 3\r
+ 1bc:  8e bd           out     0x2e, r24       ; 46\r
+ 1be:  80 91 78 00     lds     r24, 0x0078     ; 0x800078 <__data_end>\r
+ 1c2:  88 23           and     r24, r24\r
+ 1c4:  21 f0           breq    .+8             ; 0x1ce <main+0x7c>\r
+ 1c6:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 1ca:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 1cc:  03 c0           rjmp    .+6             ; 0x1d4 <main+0x82>\r
+ 1ce:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 1d2:  47 ef           ldi     r20, 0xF7       ; 247\r
+ 1d4:  6f eb           ldi     r22, 0xBF       ; 191\r
+ 1d6:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1d8:  6d df           rcall   .-294           ; 0xb4 <display_num_msb>\r
+ 1da:  80 91 60 00     lds     r24, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 1de:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 1e0:  6f e7           ldi     r22, 0x7F       ; 127\r
+ 1e2:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1e4:  67 df           rcall   .-306           ; 0xb4 <display_num_msb>\r
+ 1e6:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 1ea:  4f ef           ldi     r20, 0xFF       ; 255\r
+ 1ec:  6f ed           ldi     r22, 0xDF       ; 223\r
+ 1ee:  90 e0           ldi     r25, 0x00       ; 0\r
+ 1f0:  61 df           rcall   .-318           ; 0xb4 <display_num_msb>\r
+ 1f2:  e5 cf           rjmp    .-54            ; 0x1be <main+0x6c>\r
+\r
+000001f4 <__vector_13>:\r
+ 1f4:  1f 92           push    r1\r
+ 1f6:  0f 92           push    r0\r
+ 1f8:  0f b6           in      r0, 0x3f        ; 63\r
+ 1fa:  0f 92           push    r0\r
+ 1fc:  11 24           eor     r1, r1\r
+ 1fe:  cf 92           push    r12\r
+ 200:  df 92           push    r13\r
+ 202:  ef 92           push    r14\r
+ 204:  ff 92           push    r15\r
+ 206:  2f 93           push    r18\r
+ 208:  3f 93           push    r19\r
+ 20a:  4f 93           push    r20\r
+ 20c:  5f 93           push    r21\r
+ 20e:  6f 93           push    r22\r
+ 210:  7f 93           push    r23\r
+ 212:  8f 93           push    r24\r
+ 214:  9f 93           push    r25\r
+ 216:  af 93           push    r26\r
+ 218:  bf 93           push    r27\r
+ 21a:  cf 93           push    r28\r
+ 21c:  ef 93           push    r30\r
+ 21e:  ff 93           push    r31\r
+ 220:  80 91 78 00     lds     r24, 0x0078     ; 0x800078 <__data_end>\r
+ 224:  80 ff           sbrs    r24, 0\r
+ 226:  09 c0           rjmp    .+18            ; 0x23a <__vector_13+0x46>\r
+ 228:  8a e0           ldi     r24, 0x0A       ; 10\r
+ 22a:  80 93 60 00     sts     0x0060, r24     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 22e:  80 93 7a 00     sts     0x007A, r24     ; 0x80007a <sec>\r
+ 232:  80 93 79 00     sts     0x0079, r24     ; 0x800079 <sec_ten>\r
+ 236:  82 e0           ldi     r24, 0x02       ; 2\r
+ 238:  0c c0           rjmp    .+24            ; 0x252 <__vector_13+0x5e>\r
+ 23a:  80 91 78 00     lds     r24, 0x0078     ; 0x800078 <__data_end>\r
+ 23e:  81 ff           sbrs    r24, 1\r
+ 240:  0b c0           rjmp    .+22            ; 0x258 <__vector_13+0x64>\r
+ 242:  18 ba           out     0x18, r1        ; 24\r
+ 244:  10 92 60 00     sts     0x0060, r1      ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 248:  10 92 7a 00     sts     0x007A, r1      ; 0x80007a <sec>\r
+ 24c:  10 92 79 00     sts     0x0079, r1      ; 0x800079 <sec_ten>\r
+ 250:  81 e0           ldi     r24, 0x01       ; 1\r
+ 252:  80 93 78 00     sts     0x0078, r24     ; 0x800078 <__data_end>\r
+ 256:  65 c0           rjmp    .+202           ; 0x322 <__vector_13+0x12e>\r
+ 258:  60 91 60 00     lds     r22, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 25c:  c0 91 7a 00     lds     r28, 0x007A     ; 0x80007a <sec>\r
+ 260:  70 e0           ldi     r23, 0x00       ; 0\r
+ 262:  80 e0           ldi     r24, 0x00       ; 0\r
+ 264:  90 e0           ldi     r25, 0x00       ; 0\r
+ 266:  6e d1           rcall   .+732           ; 0x544 <__floatsisf>\r
+ 268:  20 e0           ldi     r18, 0x00       ; 0\r
+ 26a:  30 e0           ldi     r19, 0x00       ; 0\r
+ 26c:  40 e2           ldi     r20, 0x20       ; 32\r
+ 26e:  51 e4           ldi     r21, 0x41       ; 65\r
+ 270:  f5 d1           rcall   .+1002          ; 0x65c <__mulsf3>\r
+ 272:  6b 01           movw    r12, r22\r
+ 274:  7c 01           movw    r14, r24\r
+ 276:  6c 2f           mov     r22, r28\r
+ 278:  70 e0           ldi     r23, 0x00       ; 0\r
+ 27a:  80 e0           ldi     r24, 0x00       ; 0\r
+ 27c:  90 e0           ldi     r25, 0x00       ; 0\r
+ 27e:  62 d1           rcall   .+708           ; 0x544 <__floatsisf>\r
+ 280:  9b 01           movw    r18, r22\r
+ 282:  ac 01           movw    r20, r24\r
+ 284:  c7 01           movw    r24, r14\r
+ 286:  b6 01           movw    r22, r12\r
+ 288:  63 d0           rcall   .+198           ; 0x350 <__addsf3>\r
+ 28a:  2d ec           ldi     r18, 0xCD       ; 205\r
+ 28c:  3c ec           ldi     r19, 0xCC       ; 204\r
+ 28e:  4c ec           ldi     r20, 0xCC       ; 204\r
+ 290:  5d e3           ldi     r21, 0x3D       ; 61\r
+ 292:  5e d0           rcall   .+188           ; 0x350 <__addsf3>\r
+ 294:  9b 01           movw    r18, r22\r
+ 296:  ac 01           movw    r20, r24\r
+ 298:  60 e0           ldi     r22, 0x00       ; 0\r
+ 29a:  70 e8           ldi     r23, 0x80       ; 128\r
+ 29c:  8b e3           ldi     r24, 0x3B       ; 59\r
+ 29e:  96 e4           ldi     r25, 0x46       ; 70\r
+ 2a0:  bb d0           rcall   .+374           ; 0x418 <__divsf3>\r
+ 2a2:  22 d1           rcall   .+580           ; 0x4e8 <__fixunssfsi>\r
+ 2a4:  cb 01           movw    r24, r22\r
+ 2a6:  28 df           rcall   .-432           ; 0xf8 <set_beep_freq>\r
+ 2a8:  80 91 60 00     lds     r24, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 2ac:  81 11           cpse    r24, r1\r
+ 2ae:  14 c0           rjmp    .+40            ; 0x2d8 <__vector_13+0xe4>\r
+ 2b0:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 2b4:  81 11           cpse    r24, r1\r
+ 2b6:  10 c0           rjmp    .+32            ; 0x2d8 <__vector_13+0xe4>\r
+ 2b8:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 2bc:  88 23           and     r24, r24\r
+ 2be:  61 f0           breq    .+24            ; 0x2d8 <__vector_13+0xe4>\r
+ 2c0:  10 92 60 00     sts     0x0060, r1      ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 2c4:  10 92 7a 00     sts     0x007A, r1      ; 0x80007a <sec>\r
+ 2c8:  10 92 79 00     sts     0x0079, r1      ; 0x800079 <sec_ten>\r
+ 2cc:  81 e0           ldi     r24, 0x01       ; 1\r
+ 2ce:  80 93 78 00     sts     0x0078, r24     ; 0x800078 <__data_end>\r
+ 2d2:  84 ec           ldi     r24, 0xC4       ; 196\r
+ 2d4:  86 bf           out     0x36, r24       ; 54\r
+ 2d6:  25 c0           rjmp    .+74            ; 0x322 <__vector_13+0x12e>\r
+ 2d8:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 2dc:  81 11           cpse    r24, r1\r
+ 2de:  0f c0           rjmp    .+30            ; 0x2fe <__vector_13+0x10a>\r
+ 2e0:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 2e4:  81 11           cpse    r24, r1\r
+ 2e6:  0b c0           rjmp    .+22            ; 0x2fe <__vector_13+0x10a>\r
+ 2e8:  89 e0           ldi     r24, 0x09       ; 9\r
+ 2ea:  80 93 7a 00     sts     0x007A, r24     ; 0x80007a <sec>\r
+ 2ee:  80 93 79 00     sts     0x0079, r24     ; 0x800079 <sec_ten>\r
+ 2f2:  80 91 60 00     lds     r24, 0x0060     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 2f6:  81 50           subi    r24, 0x01       ; 1\r
+ 2f8:  80 93 60 00     sts     0x0060, r24     ; 0x800060 <__DATA_REGION_ORIGIN__>\r
+ 2fc:  12 c0           rjmp    .+36            ; 0x322 <__vector_13+0x12e>\r
+ 2fe:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 302:  81 11           cpse    r24, r1\r
+ 304:  09 c0           rjmp    .+18            ; 0x318 <__vector_13+0x124>\r
+ 306:  89 e0           ldi     r24, 0x09       ; 9\r
+ 308:  80 93 79 00     sts     0x0079, r24     ; 0x800079 <sec_ten>\r
+ 30c:  80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <sec>\r
+ 310:  81 50           subi    r24, 0x01       ; 1\r
+ 312:  80 93 7a 00     sts     0x007A, r24     ; 0x80007a <sec>\r
+ 316:  05 c0           rjmp    .+10            ; 0x322 <__vector_13+0x12e>\r
+ 318:  80 91 79 00     lds     r24, 0x0079     ; 0x800079 <sec_ten>\r
+ 31c:  81 50           subi    r24, 0x01       ; 1\r
+ 31e:  80 93 79 00     sts     0x0079, r24     ; 0x800079 <sec_ten>\r
+ 322:  ff 91           pop     r31\r
+ 324:  ef 91           pop     r30\r
+ 326:  cf 91           pop     r28\r
+ 328:  bf 91           pop     r27\r
+ 32a:  af 91           pop     r26\r
+ 32c:  9f 91           pop     r25\r
+ 32e:  8f 91           pop     r24\r
+ 330:  7f 91           pop     r23\r
+ 332:  6f 91           pop     r22\r
+ 334:  5f 91           pop     r21\r
+ 336:  4f 91           pop     r20\r
+ 338:  3f 91           pop     r19\r
+ 33a:  2f 91           pop     r18\r
+ 33c:  ff 90           pop     r15\r
+ 33e:  ef 90           pop     r14\r
+ 340:  df 90           pop     r13\r
+ 342:  cf 90           pop     r12\r
+ 344:  0f 90           pop     r0\r
+ 346:  0f be           out     0x3f, r0        ; 63\r
+ 348:  0f 90           pop     r0\r
+ 34a:  1f 90           pop     r1\r
+ 34c:  18 95           reti\r
+\r
+0000034e <__subsf3>:\r
+ 34e:  50 58           subi    r21, 0x80       ; 128\r
+\r
+00000350 <__addsf3>:\r
+ 350:  bb 27           eor     r27, r27\r
+ 352:  aa 27           eor     r26, r26\r
+ 354:  0e d0           rcall   .+28            ; 0x372 <__addsf3x>\r
+ 356:  48 c1           rjmp    .+656           ; 0x5e8 <__fp_round>\r
+ 358:  39 d1           rcall   .+626           ; 0x5cc <__fp_pscA>\r
+ 35a:  30 f0           brcs    .+12            ; 0x368 <__addsf3+0x18>\r
+ 35c:  3e d1           rcall   .+636           ; 0x5da <__fp_pscB>\r
+ 35e:  20 f0           brcs    .+8             ; 0x368 <__addsf3+0x18>\r
+ 360:  31 f4           brne    .+12            ; 0x36e <__addsf3+0x1e>\r
+ 362:  9f 3f           cpi     r25, 0xFF       ; 255\r
+ 364:  11 f4           brne    .+4             ; 0x36a <__addsf3+0x1a>\r
+ 366:  1e f4           brtc    .+6             ; 0x36e <__addsf3+0x1e>\r
+ 368:  2e c1           rjmp    .+604           ; 0x5c6 <__fp_nan>\r
+ 36a:  0e f4           brtc    .+2             ; 0x36e <__addsf3+0x1e>\r
+ 36c:  e0 95           com     r30\r
+ 36e:  e7 fb           bst     r30, 7\r
+ 370:  24 c1           rjmp    .+584           ; 0x5ba <__fp_inf>\r
+\r
+00000372 <__addsf3x>:\r
+ 372:  e9 2f           mov     r30, r25\r
+ 374:  4a d1           rcall   .+660           ; 0x60a <__fp_split3>\r
+ 376:  80 f3           brcs    .-32            ; 0x358 <__addsf3+0x8>\r
+ 378:  ba 17           cp      r27, r26\r
+ 37a:  62 07           cpc     r22, r18\r
+ 37c:  73 07           cpc     r23, r19\r
+ 37e:  84 07           cpc     r24, r20\r
+ 380:  95 07           cpc     r25, r21\r
+ 382:  18 f0           brcs    .+6             ; 0x38a <__addsf3x+0x18>\r
+ 384:  71 f4           brne    .+28            ; 0x3a2 <__addsf3x+0x30>\r
+ 386:  9e f5           brtc    .+102           ; 0x3ee <__addsf3x+0x7c>\r
+ 388:  62 c1           rjmp    .+708           ; 0x64e <__fp_zero>\r
+ 38a:  0e f4           brtc    .+2             ; 0x38e <__addsf3x+0x1c>\r
+ 38c:  e0 95           com     r30\r
+ 38e:  0b 2e           mov     r0, r27\r
+ 390:  ba 2f           mov     r27, r26\r
+ 392:  a0 2d           mov     r26, r0\r
+ 394:  0b 01           movw    r0, r22\r
+ 396:  b9 01           movw    r22, r18\r
+ 398:  90 01           movw    r18, r0\r
+ 39a:  0c 01           movw    r0, r24\r
+ 39c:  ca 01           movw    r24, r20\r
+ 39e:  a0 01           movw    r20, r0\r
+ 3a0:  11 24           eor     r1, r1\r
+ 3a2:  ff 27           eor     r31, r31\r
+ 3a4:  59 1b           sub     r21, r25\r
+ 3a6:  99 f0           breq    .+38            ; 0x3ce <__addsf3x+0x5c>\r
+ 3a8:  59 3f           cpi     r21, 0xF9       ; 249\r
+ 3aa:  50 f4           brcc    .+20            ; 0x3c0 <__addsf3x+0x4e>\r
+ 3ac:  50 3e           cpi     r21, 0xE0       ; 224\r
+ 3ae:  68 f1           brcs    .+90            ; 0x40a <__LOCK_REGION_LENGTH__+0xa>\r
+ 3b0:  1a 16           cp      r1, r26\r
+ 3b2:  f0 40           sbci    r31, 0x00       ; 0\r
+ 3b4:  a2 2f           mov     r26, r18\r
+ 3b6:  23 2f           mov     r18, r19\r
+ 3b8:  34 2f           mov     r19, r20\r
+ 3ba:  44 27           eor     r20, r20\r
+ 3bc:  58 5f           subi    r21, 0xF8       ; 248\r
+ 3be:  f3 cf           rjmp    .-26            ; 0x3a6 <__addsf3x+0x34>\r
+ 3c0:  46 95           lsr     r20\r
+ 3c2:  37 95           ror     r19\r
+ 3c4:  27 95           ror     r18\r
+ 3c6:  a7 95           ror     r26\r
+ 3c8:  f0 40           sbci    r31, 0x00       ; 0\r
+ 3ca:  53 95           inc     r21\r
+ 3cc:  c9 f7           brne    .-14            ; 0x3c0 <__addsf3x+0x4e>\r
+ 3ce:  7e f4           brtc    .+30            ; 0x3ee <__addsf3x+0x7c>\r
+ 3d0:  1f 16           cp      r1, r31\r
+ 3d2:  ba 0b           sbc     r27, r26\r
+ 3d4:  62 0b           sbc     r22, r18\r
+ 3d6:  73 0b           sbc     r23, r19\r
+ 3d8:  84 0b           sbc     r24, r20\r
+ 3da:  ba f0           brmi    .+46            ; 0x40a <__LOCK_REGION_LENGTH__+0xa>\r
+ 3dc:  91 50           subi    r25, 0x01       ; 1\r
+ 3de:  a1 f0           breq    .+40            ; 0x408 <__LOCK_REGION_LENGTH__+0x8>\r
+ 3e0:  ff 0f           add     r31, r31\r
+ 3e2:  bb 1f           adc     r27, r27\r
+ 3e4:  66 1f           adc     r22, r22\r
+ 3e6:  77 1f           adc     r23, r23\r
+ 3e8:  88 1f           adc     r24, r24\r
+ 3ea:  c2 f7           brpl    .-16            ; 0x3dc <__addsf3x+0x6a>\r
+ 3ec:  0e c0           rjmp    .+28            ; 0x40a <__LOCK_REGION_LENGTH__+0xa>\r
+ 3ee:  ba 0f           add     r27, r26\r
+ 3f0:  62 1f           adc     r22, r18\r
+ 3f2:  73 1f           adc     r23, r19\r
+ 3f4:  84 1f           adc     r24, r20\r
+ 3f6:  48 f4           brcc    .+18            ; 0x40a <__LOCK_REGION_LENGTH__+0xa>\r
+ 3f8:  87 95           ror     r24\r
+ 3fa:  77 95           ror     r23\r
+ 3fc:  67 95           ror     r22\r
+ 3fe:  b7 95           ror     r27\r
+ 400:  f7 95           ror     r31\r
+ 402:  9e 3f           cpi     r25, 0xFE       ; 254\r
+ 404:  08 f0           brcs    .+2             ; 0x408 <__LOCK_REGION_LENGTH__+0x8>\r
+ 406:  b3 cf           rjmp    .-154           ; 0x36e <__addsf3+0x1e>\r
+ 408:  93 95           inc     r25\r
+ 40a:  88 0f           add     r24, r24\r
+ 40c:  08 f0           brcs    .+2             ; 0x410 <__LOCK_REGION_LENGTH__+0x10>\r
+ 40e:  99 27           eor     r25, r25\r
+ 410:  ee 0f           add     r30, r30\r
+ 412:  97 95           ror     r25\r
+ 414:  87 95           ror     r24\r
+ 416:  08 95           ret\r
+\r
+00000418 <__divsf3>:\r
+ 418:  0c d0           rcall   .+24            ; 0x432 <__divsf3x>\r
+ 41a:  e6 c0           rjmp    .+460           ; 0x5e8 <__fp_round>\r
+ 41c:  de d0           rcall   .+444           ; 0x5da <__fp_pscB>\r
+ 41e:  40 f0           brcs    .+16            ; 0x430 <__divsf3+0x18>\r
+ 420:  d5 d0           rcall   .+426           ; 0x5cc <__fp_pscA>\r
+ 422:  30 f0           brcs    .+12            ; 0x430 <__divsf3+0x18>\r
+ 424:  21 f4           brne    .+8             ; 0x42e <__divsf3+0x16>\r
+ 426:  5f 3f           cpi     r21, 0xFF       ; 255\r
+ 428:  19 f0           breq    .+6             ; 0x430 <__divsf3+0x18>\r
+ 42a:  c7 c0           rjmp    .+398           ; 0x5ba <__fp_inf>\r
+ 42c:  51 11           cpse    r21, r1\r
+ 42e:  10 c1           rjmp    .+544           ; 0x650 <__fp_szero>\r
+ 430:  ca c0           rjmp    .+404           ; 0x5c6 <__fp_nan>\r
+\r
+00000432 <__divsf3x>:\r
+ 432:  eb d0           rcall   .+470           ; 0x60a <__fp_split3>\r
+ 434:  98 f3           brcs    .-26            ; 0x41c <__divsf3+0x4>\r
+\r
+00000436 <__divsf3_pse>:\r
+ 436:  99 23           and     r25, r25\r
+ 438:  c9 f3           breq    .-14            ; 0x42c <__divsf3+0x14>\r
+ 43a:  55 23           and     r21, r21\r
+ 43c:  b1 f3           breq    .-20            ; 0x42a <__divsf3+0x12>\r
+ 43e:  95 1b           sub     r25, r21\r
+ 440:  55 0b           sbc     r21, r21\r
+ 442:  bb 27           eor     r27, r27\r
+ 444:  aa 27           eor     r26, r26\r
+ 446:  62 17           cp      r22, r18\r
+ 448:  73 07           cpc     r23, r19\r
+ 44a:  84 07           cpc     r24, r20\r
+ 44c:  38 f0           brcs    .+14            ; 0x45c <__divsf3_pse+0x26>\r
+ 44e:  9f 5f           subi    r25, 0xFF       ; 255\r
+ 450:  5f 4f           sbci    r21, 0xFF       ; 255\r
+ 452:  22 0f           add     r18, r18\r
+ 454:  33 1f           adc     r19, r19\r
+ 456:  44 1f           adc     r20, r20\r
+ 458:  aa 1f           adc     r26, r26\r
+ 45a:  a9 f3           breq    .-22            ; 0x446 <__divsf3_pse+0x10>\r
+ 45c:  33 d0           rcall   .+102           ; 0x4c4 <__divsf3_pse+0x8e>\r
+ 45e:  0e 2e           mov     r0, r30\r
+ 460:  3a f0           brmi    .+14            ; 0x470 <__divsf3_pse+0x3a>\r
+ 462:  e0 e8           ldi     r30, 0x80       ; 128\r
+ 464:  30 d0           rcall   .+96            ; 0x4c6 <__divsf3_pse+0x90>\r
+ 466:  91 50           subi    r25, 0x01       ; 1\r
+ 468:  50 40           sbci    r21, 0x00       ; 0\r
+ 46a:  e6 95           lsr     r30\r
+ 46c:  00 1c           adc     r0, r0\r
+ 46e:  ca f7           brpl    .-14            ; 0x462 <__divsf3_pse+0x2c>\r
+ 470:  29 d0           rcall   .+82            ; 0x4c4 <__divsf3_pse+0x8e>\r
+ 472:  fe 2f           mov     r31, r30\r
+ 474:  27 d0           rcall   .+78            ; 0x4c4 <__divsf3_pse+0x8e>\r
+ 476:  66 0f           add     r22, r22\r
+ 478:  77 1f           adc     r23, r23\r
+ 47a:  88 1f           adc     r24, r24\r
+ 47c:  bb 1f           adc     r27, r27\r
+ 47e:  26 17           cp      r18, r22\r
+ 480:  37 07           cpc     r19, r23\r
+ 482:  48 07           cpc     r20, r24\r
+ 484:  ab 07           cpc     r26, r27\r
+ 486:  b0 e8           ldi     r27, 0x80       ; 128\r
+ 488:  09 f0           breq    .+2             ; 0x48c <__divsf3_pse+0x56>\r
+ 48a:  bb 0b           sbc     r27, r27\r
+ 48c:  80 2d           mov     r24, r0\r
+ 48e:  bf 01           movw    r22, r30\r
+ 490:  ff 27           eor     r31, r31\r
+ 492:  93 58           subi    r25, 0x83       ; 131\r
+ 494:  5f 4f           sbci    r21, 0xFF       ; 255\r
+ 496:  2a f0           brmi    .+10            ; 0x4a2 <__divsf3_pse+0x6c>\r
+ 498:  9e 3f           cpi     r25, 0xFE       ; 254\r
+ 49a:  51 05           cpc     r21, r1\r
+ 49c:  68 f0           brcs    .+26            ; 0x4b8 <__divsf3_pse+0x82>\r
+ 49e:  8d c0           rjmp    .+282           ; 0x5ba <__fp_inf>\r
+ 4a0:  d7 c0           rjmp    .+430           ; 0x650 <__fp_szero>\r
+ 4a2:  5f 3f           cpi     r21, 0xFF       ; 255\r
+ 4a4:  ec f3           brlt    .-6             ; 0x4a0 <__divsf3_pse+0x6a>\r
+ 4a6:  98 3e           cpi     r25, 0xE8       ; 232\r
+ 4a8:  dc f3           brlt    .-10            ; 0x4a0 <__divsf3_pse+0x6a>\r
+ 4aa:  86 95           lsr     r24\r
+ 4ac:  77 95           ror     r23\r
+ 4ae:  67 95           ror     r22\r
+ 4b0:  b7 95           ror     r27\r
+ 4b2:  f7 95           ror     r31\r
+ 4b4:  9f 5f           subi    r25, 0xFF       ; 255\r
+ 4b6:  c9 f7           brne    .-14            ; 0x4aa <__divsf3_pse+0x74>\r
+ 4b8:  88 0f           add     r24, r24\r
+ 4ba:  91 1d           adc     r25, r1\r
+ 4bc:  96 95           lsr     r25\r
+ 4be:  87 95           ror     r24\r
+ 4c0:  97 f9           bld     r25, 7\r
+ 4c2:  08 95           ret\r
+ 4c4:  e1 e0           ldi     r30, 0x01       ; 1\r
+ 4c6:  66 0f           add     r22, r22\r
+ 4c8:  77 1f           adc     r23, r23\r
+ 4ca:  88 1f           adc     r24, r24\r
+ 4cc:  bb 1f           adc     r27, r27\r
+ 4ce:  62 17           cp      r22, r18\r
+ 4d0:  73 07           cpc     r23, r19\r
+ 4d2:  84 07           cpc     r24, r20\r
+ 4d4:  ba 07           cpc     r27, r26\r
+ 4d6:  20 f0           brcs    .+8             ; 0x4e0 <__divsf3_pse+0xaa>\r
+ 4d8:  62 1b           sub     r22, r18\r
+ 4da:  73 0b           sbc     r23, r19\r
+ 4dc:  84 0b           sbc     r24, r20\r
+ 4de:  ba 0b           sbc     r27, r26\r
+ 4e0:  ee 1f           adc     r30, r30\r
+ 4e2:  88 f7           brcc    .-30            ; 0x4c6 <__divsf3_pse+0x90>\r
+ 4e4:  e0 95           com     r30\r
+ 4e6:  08 95           ret\r
+\r
+000004e8 <__fixunssfsi>:\r
+ 4e8:  98 d0           rcall   .+304           ; 0x61a <__fp_splitA>\r
+ 4ea:  88 f0           brcs    .+34            ; 0x50e <__fixunssfsi+0x26>\r
+ 4ec:  9f 57           subi    r25, 0x7F       ; 127\r
+ 4ee:  90 f0           brcs    .+36            ; 0x514 <__fixunssfsi+0x2c>\r
+ 4f0:  b9 2f           mov     r27, r25\r
+ 4f2:  99 27           eor     r25, r25\r
+ 4f4:  b7 51           subi    r27, 0x17       ; 23\r
+ 4f6:  a0 f0           brcs    .+40            ; 0x520 <__fixunssfsi+0x38>\r
+ 4f8:  d1 f0           breq    .+52            ; 0x52e <__fixunssfsi+0x46>\r
+ 4fa:  66 0f           add     r22, r22\r
+ 4fc:  77 1f           adc     r23, r23\r
+ 4fe:  88 1f           adc     r24, r24\r
+ 500:  99 1f           adc     r25, r25\r
+ 502:  1a f0           brmi    .+6             ; 0x50a <__fixunssfsi+0x22>\r
+ 504:  ba 95           dec     r27\r
+ 506:  c9 f7           brne    .-14            ; 0x4fa <__fixunssfsi+0x12>\r
+ 508:  12 c0           rjmp    .+36            ; 0x52e <__fixunssfsi+0x46>\r
+ 50a:  b1 30           cpi     r27, 0x01       ; 1\r
+ 50c:  81 f0           breq    .+32            ; 0x52e <__fixunssfsi+0x46>\r
+ 50e:  9f d0           rcall   .+318           ; 0x64e <__fp_zero>\r
+ 510:  b1 e0           ldi     r27, 0x01       ; 1\r
+ 512:  08 95           ret\r
+ 514:  9c c0           rjmp    .+312           ; 0x64e <__fp_zero>\r
+ 516:  67 2f           mov     r22, r23\r
+ 518:  78 2f           mov     r23, r24\r
+ 51a:  88 27           eor     r24, r24\r
+ 51c:  b8 5f           subi    r27, 0xF8       ; 248\r
+ 51e:  39 f0           breq    .+14            ; 0x52e <__fixunssfsi+0x46>\r
+ 520:  b9 3f           cpi     r27, 0xF9       ; 249\r
+ 522:  cc f3           brlt    .-14            ; 0x516 <__fixunssfsi+0x2e>\r
+ 524:  86 95           lsr     r24\r
+ 526:  77 95           ror     r23\r
+ 528:  67 95           ror     r22\r
+ 52a:  b3 95           inc     r27\r
+ 52c:  d9 f7           brne    .-10            ; 0x524 <__fixunssfsi+0x3c>\r
+ 52e:  3e f4           brtc    .+14            ; 0x53e <__fixunssfsi+0x56>\r
+ 530:  90 95           com     r25\r
+ 532:  80 95           com     r24\r
+ 534:  70 95           com     r23\r
+ 536:  61 95           neg     r22\r
+ 538:  7f 4f           sbci    r23, 0xFF       ; 255\r
+ 53a:  8f 4f           sbci    r24, 0xFF       ; 255\r
+ 53c:  9f 4f           sbci    r25, 0xFF       ; 255\r
+ 53e:  08 95           ret\r
+\r
+00000540 <__floatunsisf>:\r
+ 540:  e8 94           clt\r
+ 542:  09 c0           rjmp    .+18            ; 0x556 <__floatsisf+0x12>\r
+\r
+00000544 <__floatsisf>:\r
+ 544:  97 fb           bst     r25, 7\r
+ 546:  3e f4           brtc    .+14            ; 0x556 <__floatsisf+0x12>\r
+ 548:  90 95           com     r25\r
+ 54a:  80 95           com     r24\r
+ 54c:  70 95           com     r23\r
+ 54e:  61 95           neg     r22\r
+ 550:  7f 4f           sbci    r23, 0xFF       ; 255\r
+ 552:  8f 4f           sbci    r24, 0xFF       ; 255\r
+ 554:  9f 4f           sbci    r25, 0xFF       ; 255\r
+ 556:  99 23           and     r25, r25\r
+ 558:  a9 f0           breq    .+42            ; 0x584 <__floatsisf+0x40>\r
+ 55a:  f9 2f           mov     r31, r25\r
+ 55c:  96 e9           ldi     r25, 0x96       ; 150\r
+ 55e:  bb 27           eor     r27, r27\r
+ 560:  93 95           inc     r25\r
+ 562:  f6 95           lsr     r31\r
+ 564:  87 95           ror     r24\r
+ 566:  77 95           ror     r23\r
+ 568:  67 95           ror     r22\r
+ 56a:  b7 95           ror     r27\r
+ 56c:  f1 11           cpse    r31, r1\r
+ 56e:  f8 cf           rjmp    .-16            ; 0x560 <__floatsisf+0x1c>\r
+ 570:  fa f4           brpl    .+62            ; 0x5b0 <__floatsisf+0x6c>\r
+ 572:  bb 0f           add     r27, r27\r
+ 574:  11 f4           brne    .+4             ; 0x57a <__floatsisf+0x36>\r
+ 576:  60 ff           sbrs    r22, 0\r
+ 578:  1b c0           rjmp    .+54            ; 0x5b0 <__floatsisf+0x6c>\r
+ 57a:  6f 5f           subi    r22, 0xFF       ; 255\r
+ 57c:  7f 4f           sbci    r23, 0xFF       ; 255\r
+ 57e:  8f 4f           sbci    r24, 0xFF       ; 255\r
+ 580:  9f 4f           sbci    r25, 0xFF       ; 255\r
+ 582:  16 c0           rjmp    .+44            ; 0x5b0 <__floatsisf+0x6c>\r
+ 584:  88 23           and     r24, r24\r
+ 586:  11 f0           breq    .+4             ; 0x58c <__floatsisf+0x48>\r
+ 588:  96 e9           ldi     r25, 0x96       ; 150\r
+ 58a:  11 c0           rjmp    .+34            ; 0x5ae <__floatsisf+0x6a>\r
+ 58c:  77 23           and     r23, r23\r
+ 58e:  21 f0           breq    .+8             ; 0x598 <__floatsisf+0x54>\r
+ 590:  9e e8           ldi     r25, 0x8E       ; 142\r
+ 592:  87 2f           mov     r24, r23\r
+ 594:  76 2f           mov     r23, r22\r
+ 596:  05 c0           rjmp    .+10            ; 0x5a2 <__floatsisf+0x5e>\r
+ 598:  66 23           and     r22, r22\r
+ 59a:  71 f0           breq    .+28            ; 0x5b8 <__floatsisf+0x74>\r
+ 59c:  96 e8           ldi     r25, 0x86       ; 134\r
+ 59e:  86 2f           mov     r24, r22\r
+ 5a0:  70 e0           ldi     r23, 0x00       ; 0\r
+ 5a2:  60 e0           ldi     r22, 0x00       ; 0\r
+ 5a4:  2a f0           brmi    .+10            ; 0x5b0 <__floatsisf+0x6c>\r
+ 5a6:  9a 95           dec     r25\r
+ 5a8:  66 0f           add     r22, r22\r
+ 5aa:  77 1f           adc     r23, r23\r
+ 5ac:  88 1f           adc     r24, r24\r
+ 5ae:  da f7           brpl    .-10            ; 0x5a6 <__floatsisf+0x62>\r
+ 5b0:  88 0f           add     r24, r24\r
+ 5b2:  96 95           lsr     r25\r
+ 5b4:  87 95           ror     r24\r
+ 5b6:  97 f9           bld     r25, 7\r
+ 5b8:  08 95           ret\r
+\r
+000005ba <__fp_inf>:\r
+ 5ba:  97 f9           bld     r25, 7\r
+ 5bc:  9f 67           ori     r25, 0x7F       ; 127\r
+ 5be:  80 e8           ldi     r24, 0x80       ; 128\r
+ 5c0:  70 e0           ldi     r23, 0x00       ; 0\r
+ 5c2:  60 e0           ldi     r22, 0x00       ; 0\r
+ 5c4:  08 95           ret\r
+\r
+000005c6 <__fp_nan>:\r
+ 5c6:  9f ef           ldi     r25, 0xFF       ; 255\r
+ 5c8:  80 ec           ldi     r24, 0xC0       ; 192\r
+ 5ca:  08 95           ret\r
+\r
+000005cc <__fp_pscA>:\r
+ 5cc:  00 24           eor     r0, r0\r
+ 5ce:  0a 94           dec     r0\r
+ 5d0:  16 16           cp      r1, r22\r
+ 5d2:  17 06           cpc     r1, r23\r
+ 5d4:  18 06           cpc     r1, r24\r
+ 5d6:  09 06           cpc     r0, r25\r
+ 5d8:  08 95           ret\r
+\r
+000005da <__fp_pscB>:\r
+ 5da:  00 24           eor     r0, r0\r
+ 5dc:  0a 94           dec     r0\r
+ 5de:  12 16           cp      r1, r18\r
+ 5e0:  13 06           cpc     r1, r19\r
+ 5e2:  14 06           cpc     r1, r20\r
+ 5e4:  05 06           cpc     r0, r21\r
+ 5e6:  08 95           ret\r
+\r
+000005e8 <__fp_round>:\r
+ 5e8:  09 2e           mov     r0, r25\r
+ 5ea:  03 94           inc     r0\r
+ 5ec:  00 0c           add     r0, r0\r
+ 5ee:  11 f4           brne    .+4             ; 0x5f4 <__fp_round+0xc>\r
+ 5f0:  88 23           and     r24, r24\r
+ 5f2:  52 f0           brmi    .+20            ; 0x608 <__fp_round+0x20>\r
+ 5f4:  bb 0f           add     r27, r27\r
+ 5f6:  40 f4           brcc    .+16            ; 0x608 <__fp_round+0x20>\r
+ 5f8:  bf 2b           or      r27, r31\r
+ 5fa:  11 f4           brne    .+4             ; 0x600 <__fp_round+0x18>\r
+ 5fc:  60 ff           sbrs    r22, 0\r
+ 5fe:  04 c0           rjmp    .+8             ; 0x608 <__fp_round+0x20>\r
+ 600:  6f 5f           subi    r22, 0xFF       ; 255\r
+ 602:  7f 4f           sbci    r23, 0xFF       ; 255\r
+ 604:  8f 4f           sbci    r24, 0xFF       ; 255\r
+ 606:  9f 4f           sbci    r25, 0xFF       ; 255\r
+ 608:  08 95           ret\r
+\r
+0000060a <__fp_split3>:\r
+ 60a:  57 fd           sbrc    r21, 7\r
+ 60c:  90 58           subi    r25, 0x80       ; 128\r
+ 60e:  44 0f           add     r20, r20\r
+ 610:  55 1f           adc     r21, r21\r
+ 612:  59 f0           breq    .+22            ; 0x62a <__fp_splitA+0x10>\r
+ 614:  5f 3f           cpi     r21, 0xFF       ; 255\r
+ 616:  71 f0           breq    .+28            ; 0x634 <__fp_splitA+0x1a>\r
+ 618:  47 95           ror     r20\r
+\r
+0000061a <__fp_splitA>:\r
+ 61a:  88 0f           add     r24, r24\r
+ 61c:  97 fb           bst     r25, 7\r
+ 61e:  99 1f           adc     r25, r25\r
+ 620:  61 f0           breq    .+24            ; 0x63a <__fp_splitA+0x20>\r
+ 622:  9f 3f           cpi     r25, 0xFF       ; 255\r
+ 624:  79 f0           breq    .+30            ; 0x644 <__fp_splitA+0x2a>\r
+ 626:  87 95           ror     r24\r
+ 628:  08 95           ret\r
+ 62a:  12 16           cp      r1, r18\r
+ 62c:  13 06           cpc     r1, r19\r
+ 62e:  14 06           cpc     r1, r20\r
+ 630:  55 1f           adc     r21, r21\r
+ 632:  f2 cf           rjmp    .-28            ; 0x618 <__fp_split3+0xe>\r
+ 634:  46 95           lsr     r20\r
+ 636:  f1 df           rcall   .-30            ; 0x61a <__fp_splitA>\r
+ 638:  08 c0           rjmp    .+16            ; 0x64a <__fp_splitA+0x30>\r
+ 63a:  16 16           cp      r1, r22\r
+ 63c:  17 06           cpc     r1, r23\r
+ 63e:  18 06           cpc     r1, r24\r
+ 640:  99 1f           adc     r25, r25\r
+ 642:  f1 cf           rjmp    .-30            ; 0x626 <__fp_splitA+0xc>\r
+ 644:  86 95           lsr     r24\r
+ 646:  71 05           cpc     r23, r1\r
+ 648:  61 05           cpc     r22, r1\r
+ 64a:  08 94           sec\r
+ 64c:  08 95           ret\r
+\r
+0000064e <__fp_zero>:\r
+ 64e:  e8 94           clt\r
+\r
+00000650 <__fp_szero>:\r
+ 650:  bb 27           eor     r27, r27\r
+ 652:  66 27           eor     r22, r22\r
+ 654:  77 27           eor     r23, r23\r
+ 656:  cb 01           movw    r24, r22\r
+ 658:  97 f9           bld     r25, 7\r
+ 65a:  08 95           ret\r
+\r
+0000065c <__mulsf3>:\r
+ 65c:  0a d0           rcall   .+20            ; 0x672 <__mulsf3x>\r
+ 65e:  c4 cf           rjmp    .-120           ; 0x5e8 <__fp_round>\r
+ 660:  b5 df           rcall   .-150           ; 0x5cc <__fp_pscA>\r
+ 662:  28 f0           brcs    .+10            ; 0x66e <__mulsf3+0x12>\r
+ 664:  ba df           rcall   .-140           ; 0x5da <__fp_pscB>\r
+ 666:  18 f0           brcs    .+6             ; 0x66e <__mulsf3+0x12>\r
+ 668:  95 23           and     r25, r21\r
+ 66a:  09 f0           breq    .+2             ; 0x66e <__mulsf3+0x12>\r
+ 66c:  a6 cf           rjmp    .-180           ; 0x5ba <__fp_inf>\r
+ 66e:  ab cf           rjmp    .-170           ; 0x5c6 <__fp_nan>\r
+ 670:  ef cf           rjmp    .-34            ; 0x650 <__fp_szero>\r
+\r
+00000672 <__mulsf3x>:\r
+ 672:  cb df           rcall   .-106           ; 0x60a <__fp_split3>\r
+ 674:  a8 f3           brcs    .-22            ; 0x660 <__mulsf3+0x4>\r
+\r
+00000676 <__mulsf3_pse>:\r
+ 676:  99 23           and     r25, r25\r
+ 678:  d9 f3           breq    .-10            ; 0x670 <__mulsf3+0x14>\r
+ 67a:  55 23           and     r21, r21\r
+ 67c:  c9 f3           breq    .-14            ; 0x670 <__mulsf3+0x14>\r
+ 67e:  95 0f           add     r25, r21\r
+ 680:  50 e0           ldi     r21, 0x00       ; 0\r
+ 682:  55 1f           adc     r21, r21\r
+ 684:  aa 27           eor     r26, r26\r
+ 686:  ee 27           eor     r30, r30\r
+ 688:  ff 27           eor     r31, r31\r
+ 68a:  bb 27           eor     r27, r27\r
+ 68c:  00 24           eor     r0, r0\r
+ 68e:  08 94           sec\r
+ 690:  67 95           ror     r22\r
+ 692:  20 f4           brcc    .+8             ; 0x69c <__mulsf3_pse+0x26>\r
+ 694:  e2 0f           add     r30, r18\r
+ 696:  f3 1f           adc     r31, r19\r
+ 698:  b4 1f           adc     r27, r20\r
+ 69a:  0a 1e           adc     r0, r26\r
+ 69c:  22 0f           add     r18, r18\r
+ 69e:  33 1f           adc     r19, r19\r
+ 6a0:  44 1f           adc     r20, r20\r
+ 6a2:  aa 1f           adc     r26, r26\r
+ 6a4:  66 95           lsr     r22\r
+ 6a6:  a9 f7           brne    .-22            ; 0x692 <__mulsf3_pse+0x1c>\r
+ 6a8:  77 95           ror     r23\r
+ 6aa:  30 f4           brcc    .+12            ; 0x6b8 <__mulsf3_pse+0x42>\r
+ 6ac:  f3 0f           add     r31, r19\r
+ 6ae:  b4 1f           adc     r27, r20\r
+ 6b0:  0a 1e           adc     r0, r26\r
+ 6b2:  12 1e           adc     r1, r18\r
+ 6b4:  08 f4           brcc    .+2             ; 0x6b8 <__mulsf3_pse+0x42>\r
+ 6b6:  63 95           inc     r22\r
+ 6b8:  33 0f           add     r19, r19\r
+ 6ba:  44 1f           adc     r20, r20\r
+ 6bc:  aa 1f           adc     r26, r26\r
+ 6be:  22 1f           adc     r18, r18\r
+ 6c0:  76 95           lsr     r23\r
+ 6c2:  99 f7           brne    .-26            ; 0x6aa <__mulsf3_pse+0x34>\r
+ 6c4:  87 95           ror     r24\r
+ 6c6:  20 f4           brcc    .+8             ; 0x6d0 <__mulsf3_pse+0x5a>\r
+ 6c8:  b4 0f           add     r27, r20\r
+ 6ca:  0a 1e           adc     r0, r26\r
+ 6cc:  12 1e           adc     r1, r18\r
+ 6ce:  63 1f           adc     r22, r19\r
+ 6d0:  44 0f           add     r20, r20\r
+ 6d2:  aa 1f           adc     r26, r26\r
+ 6d4:  22 1f           adc     r18, r18\r
+ 6d6:  33 1f           adc     r19, r19\r
+ 6d8:  86 95           lsr     r24\r
+ 6da:  a9 f7           brne    .-22            ; 0x6c6 <__mulsf3_pse+0x50>\r
+ 6dc:  86 2f           mov     r24, r22\r
+ 6de:  71 2d           mov     r23, r1\r
+ 6e0:  60 2d           mov     r22, r0\r
+ 6e2:  11 24           eor     r1, r1\r
+ 6e4:  9f 57           subi    r25, 0x7F       ; 127\r
+ 6e6:  50 40           sbci    r21, 0x00       ; 0\r
+ 6e8:  8a f0           brmi    .+34            ; 0x70c <__mulsf3_pse+0x96>\r
+ 6ea:  e1 f0           breq    .+56            ; 0x724 <__mulsf3_pse+0xae>\r
+ 6ec:  88 23           and     r24, r24\r
+ 6ee:  4a f0           brmi    .+18            ; 0x702 <__mulsf3_pse+0x8c>\r
+ 6f0:  ee 0f           add     r30, r30\r
+ 6f2:  ff 1f           adc     r31, r31\r
+ 6f4:  bb 1f           adc     r27, r27\r
+ 6f6:  66 1f           adc     r22, r22\r
+ 6f8:  77 1f           adc     r23, r23\r
+ 6fa:  88 1f           adc     r24, r24\r
+ 6fc:  91 50           subi    r25, 0x01       ; 1\r
+ 6fe:  50 40           sbci    r21, 0x00       ; 0\r
+ 700:  a9 f7           brne    .-22            ; 0x6ec <__mulsf3_pse+0x76>\r
+ 702:  9e 3f           cpi     r25, 0xFE       ; 254\r
+ 704:  51 05           cpc     r21, r1\r
+ 706:  70 f0           brcs    .+28            ; 0x724 <__mulsf3_pse+0xae>\r
+ 708:  58 cf           rjmp    .-336           ; 0x5ba <__fp_inf>\r
+ 70a:  a2 cf           rjmp    .-188           ; 0x650 <__fp_szero>\r
+ 70c:  5f 3f           cpi     r21, 0xFF       ; 255\r
+ 70e:  ec f3           brlt    .-6             ; 0x70a <__mulsf3_pse+0x94>\r
+ 710:  98 3e           cpi     r25, 0xE8       ; 232\r
+ 712:  dc f3           brlt    .-10            ; 0x70a <__mulsf3_pse+0x94>\r
+ 714:  86 95           lsr     r24\r
+ 716:  77 95           ror     r23\r
+ 718:  67 95           ror     r22\r
+ 71a:  b7 95           ror     r27\r
+ 71c:  f7 95           ror     r31\r
+ 71e:  e7 95           ror     r30\r
+ 720:  9f 5f           subi    r25, 0xFF       ; 255\r
+ 722:  c1 f7           brne    .-16            ; 0x714 <__mulsf3_pse+0x9e>\r
+ 724:  fe 2b           or      r31, r30\r
+ 726:  88 0f           add     r24, r24\r
+ 728:  91 1d           adc     r25, r1\r
+ 72a:  96 95           lsr     r25\r
+ 72c:  87 95           ror     r24\r
+ 72e:  97 f9           bld     r25, 7\r
+ 730:  08 95           ret\r
+\r
+00000732 <_exit>:\r
+ 732:  f8 94           cli\r
+\r
+00000734 <__stop_program>:\r
+ 734:  ff cf           rjmp    .-2             ; 0x734 <__stop_program>\r

diff --git a/firmware/Release/dynamit.map b/firmware/Release/dynamit.map
new file mode 100644 (file)
index 0000000..cbea39f
--- /dev/null
+++ b/firmware/Release/dynamit.map
@@ -0,0 +1,597 @@
+Archive member included to satisfy reference by file (symbol)\r
+\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3.o)\r
+                              main.o (__subsf3)\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o)\r
+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3.o) (__addsf3x)\r
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+                              main.o (__divsf3)\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(divsf3x.o)\r
+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(divsf3.o) (__divsf3x)\r
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+                              main.o (__fixunssfsi)\r
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+                              main.o (__floatunsisf)\r
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+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o) (__fp_inf)\r
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+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o) (__fp_nan)\r
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+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o) (__fp_pscA)\r
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+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o) (__fp_pscB)\r
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+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3.o) (__fp_round)\r
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+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o) (__fp_split3)\r
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+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(addsf3x.o) (__fp_zero)\r
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+                              main.o (__mulsf3)\r
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+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avr25/tiny-stack\libm.a(mulsf3.o) (__mulsf3x)\r
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avr25/tiny-stack\libgcc.a(_exit.o)\r
+                              C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny2313/avr25/tiny-stack/crtattiny2313.o (exit)\r
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+                              main.o (__do_copy_data)\r
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+                              main.o (__do_clear_bss)\r
+\r
+Discarded input sections\r
+\r
+ .data          0x00000000        0x0 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/gcc/dev/attiny2313/avr25/tiny-stack/crtattiny2313.o\r
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+ .text          0x00000000        0x0 main.o\r
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diff --git a/firmware/Release/dynamit.srec b/firmware/Release/dynamit.srec
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diff --git a/firmware/Release/main.d b/firmware/Release/main.d
new file mode 100644 (file)
index 0000000..0943a1d
--- /dev/null
+++ b/firmware/Release/main.d
@@ -0,0 +1,46 @@
+main.d main.o: .././main.c \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h \\r
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+ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include/avr/iotn2313.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h \\r
+ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\io.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\sfr_defs.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\inttypes.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\lib\gcc\avr\5.4.0\include\stdint.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\stdint.h:\r
+\r
+C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include/avr/iotn2313.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\portpins.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\common.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\version.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\fuse.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\lock.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\avr\interrupt.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\util\delay_basic.h:\r
+\r
+c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\avr8\avr8-gnu-toolchain\avr\include\math.h:\r

diff --git a/firmware/Release/main.o b/firmware/Release/main.o
new file mode 100644 (file)
index 0000000..31f840c
Binary files /dev/null and b/firmware/Release/main.o differ

diff --git a/firmware/Release/makedep.mk b/firmware/Release/makedep.mk
new file mode 100644 (file)
index 0000000..2925510
--- /dev/null
+++ b/firmware/Release/makedep.mk
@@ -0,0 +1,6 @@
+################################################################################\r
+# Automatically-generated file. Do not edit or delete the file\r
+################################################################################\r
+\r
+main.c\r
+\r

diff --git a/firmware/dynamit.atsln b/firmware/dynamit.atsln
new file mode 100644 (file)
index 0000000..30e5f00
--- /dev/null
+++ b/firmware/dynamit.atsln
@@ -0,0 +1,22 @@
+\r
+Microsoft Visual Studio Solution File, Format Version 12.00\r
+# Atmel Studio Solution File, Format Version 11.00\r
+VisualStudioVersion = 14.0.23107.0\r
+MinimumVisualStudioVersion = 10.0.40219.1\r
+Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "dynamit", "dynamit.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}"\r
+EndProject\r
+Global\r
+       GlobalSection(SolutionConfigurationPlatforms) = preSolution\r
+               Debug|AVR = Debug|AVR\r
+               Release|AVR = Release|AVR\r
+       EndGlobalSection\r
+       GlobalSection(ProjectConfigurationPlatforms) = postSolution\r
+               {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|AVR.ActiveCfg = Debug|AVR\r
+               {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|AVR.Build.0 = Debug|AVR\r
+               {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.ActiveCfg = Release|AVR\r
+               {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.Build.0 = Release|AVR\r
+       EndGlobalSection\r
+       GlobalSection(SolutionProperties) = preSolution\r
+               HideSolutionNode = FALSE\r
+       EndGlobalSection\r
+EndGlobal\r

diff --git a/firmware/dynamit.componentinfo.xml b/firmware/dynamit.componentinfo.xml
new file mode 100644 (file)
index 0000000..9aa8445
--- /dev/null
+++ b/firmware/dynamit.componentinfo.xml
@@ -0,0 +1,86 @@
+<?xml version="1.0" encoding="utf-8"?>\r
+<Store xmlns:i="http://www.w3.org/2001/XMLSchema-instance" xmlns="AtmelPackComponentManagement">\r
+       <ProjectComponents>\r
+               <ProjectComponent z:Id="i1" xmlns:z="http://schemas.microsoft.com/2003/10/Serialization/">\r
+                       <CApiVersion></CApiVersion>\r
+                       <CBundle></CBundle>\r
+                       <CClass>Device</CClass>\r
+                       <CGroup>Startup</CGroup>\r
+                       <CSub></CSub>\r
+                       <CVariant></CVariant>\r
+                       <CVendor>Atmel</CVendor>\r
+                       <CVersion>1.10.0</CVersion>\r
+                       <DefaultRepoPath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs</DefaultRepoPath>\r
+                       <DependentComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays" />\r
+                       <Description></Description>\r
+                       <Files xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">\r
+                               <d4p1:anyType i:type="FileInfo">\r
+                                       <AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include\</AbsolutePath>\r
+                                       <Attribute></Attribute>\r
+                                       <Category>include</Category>\r
+                                       <Condition>C</Condition>\r
+                                       <FileContentHash i:nil="true" />\r
+                                       <FileVersion></FileVersion>\r
+                                       <Name>include/</Name>\r
+                                       <SelectString></SelectString>\r
+                                       <SourcePath></SourcePath>\r
+                               </d4p1:anyType>\r
+                               <d4p1:anyType i:type="FileInfo">\r
+                                       <AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\include\avr\iotn2313.h</AbsolutePath>\r
+                                       <Attribute></Attribute>\r
+                                       <Category>header</Category>\r
+                                       <Condition>C</Condition>\r
+                                       <FileContentHash>mgg2G9+qzT+VIuUFWhCuSQ==</FileContentHash>\r
+                                       <FileVersion></FileVersion>\r
+                                       <Name>include/avr/iotn2313.h</Name>\r
+                                       <SelectString></SelectString>\r
+                                       <SourcePath></SourcePath>\r
+                               </d4p1:anyType>\r
+                               <d4p1:anyType i:type="FileInfo">\r
+                                       <AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\templates\main.c</AbsolutePath>\r
+                                       <Attribute>template</Attribute>\r
+                                       <Category>source</Category>\r
+                                       <Condition>C Exe</Condition>\r
+                                       <FileContentHash>KjvOcFWd++tbnsEMfVPd/w==</FileContentHash>\r
+                                       <FileVersion></FileVersion>\r
+                                       <Name>templates/main.c</Name>\r
+                                       <SelectString>Main file (.c)</SelectString>\r
+                                       <SourcePath></SourcePath>\r
+                               </d4p1:anyType>\r
+                               <d4p1:anyType i:type="FileInfo">\r
+                                       <AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\templates\main.cpp</AbsolutePath>\r
+                                       <Attribute>template</Attribute>\r
+                                       <Category>source</Category>\r
+                                       <Condition>C Exe</Condition>\r
+                                       <FileContentHash>mkKaE95TOoATsuBGv6jmxg==</FileContentHash>\r
+                                       <FileVersion></FileVersion>\r
+                                       <Name>templates/main.cpp</Name>\r
+                                       <SelectString>Main file (.cpp)</SelectString>\r
+                                       <SourcePath></SourcePath>\r
+                               </d4p1:anyType>\r
+                               <d4p1:anyType i:type="FileInfo">\r
+                                       <AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313</AbsolutePath>\r
+                                       <Attribute></Attribute>\r
+                                       <Category>libraryPrefix</Category>\r
+                                       <Condition>GCC</Condition>\r
+                                       <FileContentHash i:nil="true" />\r
+                                       <FileVersion></FileVersion>\r
+                                       <Name>gcc/dev/attiny2313</Name>\r
+                                       <SelectString></SelectString>\r
+                                       <SourcePath></SourcePath>\r
+                               </d4p1:anyType>\r
+                       </Files>\r
+                       <PackName>ATtiny_DFP</PackName>\r
+                       <PackPath>C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATtiny_DFP/1.10.348/Atmel.ATtiny_DFP.pdsc</PackPath>\r
+                       <PackVersion>1.10.348</PackVersion>\r
+                       <PresentInProject>true</PresentInProject>\r
+                       <ReferenceConditionId>ATtiny2313</ReferenceConditionId>\r
+                       <RteComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">\r
+                               <d4p1:string></d4p1:string>\r
+                       </RteComponents>\r
+                       <Status>Resolved</Status>\r
+                       <VersionMode>Fixed</VersionMode>\r
+                       <IsComponentInAtProject>true</IsComponentInAtProject>\r
+               </ProjectComponent>\r
+       </ProjectComponents>\r
+</Store>
\ No newline at end of file

diff --git a/firmware/dynamit.cproj b/firmware/dynamit.cproj
new file mode 100644 (file)
index 0000000..9d2d590
--- /dev/null
+++ b/firmware/dynamit.cproj
@@ -0,0 +1,155 @@
+<?xml version="1.0" encoding="utf-8"?>\r
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003" ToolsVersion="14.0">\r
+  <PropertyGroup>\r
+    <SchemaVersion>2.0</SchemaVersion>\r
+    <ProjectVersion>7.0</ProjectVersion>\r
+    <ToolchainName>com.Atmel.AVRGCC8.C</ToolchainName>\r
+    <ProjectGuid>dce6c7e3-ee26-4d79-826b-08594b9ad897</ProjectGuid>\r
+    <avrdevice>ATtiny2313</avrdevice>\r
+    <avrdeviceseries>none</avrdeviceseries>\r
+    <OutputType>Executable</OutputType>\r
+    <Language>C</Language>\r
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>\r
+    <OutputFileExtension>.elf</OutputFileExtension>\r
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>\r
+    <AssemblyName>dynamit</AssemblyName>\r
+    <Name>dynamit</Name>\r
+    <RootNamespace>dynamit</RootNamespace>\r
+    <ToolchainFlavour>Native</ToolchainFlavour>\r
+    <KeepTimersRunning>true</KeepTimersRunning>\r
+    <OverrideVtor>false</OverrideVtor>\r
+    <CacheFlash>true</CacheFlash>\r
+    <ProgFlashFromRam>true</ProgFlashFromRam>\r
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>\r
+    <UncachedRange />\r
+    <preserveEEPROM>false</preserveEEPROM>\r
+    <OverrideVtorValue>exception_table</OverrideVtorValue>\r
+    <BootSegment>2</BootSegment>\r
+    <ResetRule>0</ResetRule>\r
+    <eraseonlaunchrule>1</eraseonlaunchrule>\r
+    <EraseKey />\r
+    <AsfFrameworkConfig>\r
+      <framework-data xmlns="">\r
+        <options />\r
+        <configurations />\r
+        <files />\r
+        <documentation help="" />\r
+        <offline-documentation help="" />\r
+        <dependencies>\r
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.52.0" />\r
+        </dependencies>\r
+      </framework-data>\r
+    </AsfFrameworkConfig>\r
+    <avrtool>com.atmel.avrdbg.tool.jtagice3plus</avrtool>\r
+    <avrtoolserialnumber>J30200019319</avrtoolserialnumber>\r
+    <avrdeviceexpectedsignature>0x1E910A</avrdeviceexpectedsignature>\r
+    <com_atmel_avrdbg_tool_jtagice3plus>\r
+      <ToolOptions>\r
+        <InterfaceProperties>\r
+          <IspClock>125000</IspClock>\r
+        </InterfaceProperties>\r
+        <InterfaceName>debugWIRE</InterfaceName>\r
+      </ToolOptions>\r
+      <ToolType>com.atmel.avrdbg.tool.jtagice3plus</ToolType>\r
+      <ToolNumber>J30200019319</ToolNumber>\r
+      <ToolName>JTAGICE3</ToolName>\r
+    </com_atmel_avrdbg_tool_jtagice3plus>\r
+    <avrtoolinterface>debugWIRE</avrtoolinterface>\r
+    <avrtoolinterfaceclock>125000</avrtoolinterfaceclock>\r
+    <com_atmel_avrdbg_tool_simulator>\r
+      <ToolOptions xmlns="">\r
+        <InterfaceProperties>\r
+        </InterfaceProperties>\r
+        <InterfaceName>debugWIRE</InterfaceName>\r
+      </ToolOptions>\r
+      <ToolType xmlns="">com.atmel.avrdbg.tool.simulator</ToolType>\r
+      <ToolNumber xmlns="">\r
+      </ToolNumber>\r
+      <ToolName xmlns="">Simulator</ToolName>\r
+    </com_atmel_avrdbg_tool_simulator>\r
+  </PropertyGroup>\r
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">\r
+    <ToolchainSettings>\r
+      <AvrGcc>\r
+        <avrgcc.common.Device>-mmcu=attiny2313 -B "%24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313"</avrgcc.common.Device>\r
+        <avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>\r
+        <avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>\r
+        <avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>\r
+        <avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>\r
+        <avrgcc.common.outputfiles.usersignatures>False</avrgcc.common.outputfiles.usersignatures>\r
+        <avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>\r
+        <avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>\r
+        <avrgcc.compiler.symbols.DefSymbols>\r
+          <ListValues>\r
+            <Value>NDEBUG</Value>\r
+          </ListValues>\r
+        </avrgcc.compiler.symbols.DefSymbols>\r
+        <avrgcc.compiler.directories.IncludePaths>\r
+          <ListValues>\r
+            <Value>%24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\include\</Value>\r
+          </ListValues>\r
+        </avrgcc.compiler.directories.IncludePaths>\r
+        <avrgcc.compiler.optimization.level>Optimize for size (-Os)</avrgcc.compiler.optimization.level>\r
+        <avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>\r
+        <avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>\r
+        <avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>\r
+        <avrgcc.linker.libraries.Libraries>\r
+          <ListValues>\r
+            <Value>libm</Value>\r
+          </ListValues>\r
+        </avrgcc.linker.libraries.Libraries>\r
+        <avrgcc.assembler.general.IncludePaths>\r
+          <ListValues>\r
+            <Value>%24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\include\</Value>\r
+          </ListValues>\r
+        </avrgcc.assembler.general.IncludePaths>\r
+      </AvrGcc>\r
+    </ToolchainSettings>\r
+  </PropertyGroup>\r
+  <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">\r
+    <ToolchainSettings>\r
+      <AvrGcc>\r
+        <avrgcc.common.Device>-mmcu=attiny2313 -B "%24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\gcc\dev\attiny2313"</avrgcc.common.Device>\r
+        <avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>\r
+        <avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>\r
+        <avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>\r
+        <avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>\r
+        <avrgcc.common.outputfiles.usersignatures>False</avrgcc.common.outputfiles.usersignatures>\r
+        <avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>\r
+        <avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>\r
+        <avrgcc.compiler.symbols.DefSymbols>\r
+          <ListValues>\r
+            <Value>DEBUG</Value>\r
+          </ListValues>\r
+        </avrgcc.compiler.symbols.DefSymbols>\r
+        <avrgcc.compiler.directories.IncludePaths>\r
+          <ListValues>\r
+            <Value>%24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\include\</Value>\r
+          </ListValues>\r
+        </avrgcc.compiler.directories.IncludePaths>\r
+        <avrgcc.compiler.optimization.level>Optimize debugging experience (-Og)</avrgcc.compiler.optimization.level>\r
+        <avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>\r
+        <avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>\r
+        <avrgcc.compiler.optimization.DebugLevel>Default (-g2)</avrgcc.compiler.optimization.DebugLevel>\r
+        <avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>\r
+        <avrgcc.linker.libraries.Libraries>\r
+          <ListValues>\r
+            <Value>libm</Value>\r
+          </ListValues>\r
+        </avrgcc.linker.libraries.Libraries>\r
+        <avrgcc.assembler.general.IncludePaths>\r
+          <ListValues>\r
+            <Value>%24(PackRepoDir)\atmel\ATtiny_DFP\1.10.348\include\</Value>\r
+          </ListValues>\r
+        </avrgcc.assembler.general.IncludePaths>\r
+        <avrgcc.assembler.debugging.DebugLevel>Default (-Wa,-g)</avrgcc.assembler.debugging.DebugLevel>\r
+      </AvrGcc>\r
+    </ToolchainSettings>\r
+  </PropertyGroup>\r
+  <ItemGroup>\r
+    <Compile Include="main.c">\r
+      <SubType>compile</SubType>\r
+    </Compile>\r
+  </ItemGroup>\r
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />\r
+</Project>
\ No newline at end of file

diff --git a/firmware/main.c b/firmware/main.c
new file mode 100644 (file)
index 0000000..40702e9
--- /dev/null
+++ b/firmware/main.c
@@ -0,0 +1,243 @@
+/*
+ * dynamit.c
+ *
+ * Created: 3/4/2024 3:07:17 PM
+ * Author : forss
+ */ 
+
+#define F_CPU 1000000UL
+
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>\r
+
+/************************************************************************/
+/*
+Vcc will vary between 2-3 Volt, system frequency can not exceed 4MHz.
+Default setting of ~1MHz is fine.
+*/
+/************************************************************************/
+
+#define TIMER_INTERVAL_MS 100
+#define BEEP_LENGTH_MS 100
+
+typedef enum {
+       LEFT = 0b01111111,
+       MIDDLE = 0b10111111,
+       RIGHT = 0b11011111
+} digit_msb;
+
+typedef enum {
+       DP_ON = 0b11110111,
+       DP_OFF = 0b11111111
+} decimal_point_msb;
+
+// Last num is display off
+#define DISPLAY_OFF 10
+uint16_t numbers_msb[11] = {0xe3e9, 0xefef, 0xebd9, 0xebcb, 0xe7cf, 0xf3cb, 0xf3c9, 0xebef, 0xe3c9, 0xe3cb, 0xffff};
+
+volatile uint8_t ten_sec = 6;
+volatile uint8_t sec = 0;
+volatile uint8_t sec_ten = 0;
+volatile uint8_t boom = 0;
+
+volatile 
+
+void shift_out_msb(uint8_t);
+void display_num_msb(uint16_t, digit_msb, decimal_point_msb);
+
+void set_beep_freq(uint16_t);
+void turn_off_beep();
+
+int main(void)
+{
+       cli();
+       
+       // Set up timer0 as clock, no pin output, interrupt, CTC
+       TCCR0A |= (1 << WGM01);
+       TIMSK |= (1 << OCIE0A);
+       OCR0A = F_CPU / 1024 / TIMER_INTERVAL_MS * 10;
+       
+       // Set up timer1 as beeper, no pin output, interrupt, OCR1A is top, OCR1B is compare, PWM phase correct
+       TCCR1A |= (1 << WGM11) | (1 << WGM10);
+       TCCR1B |= (1 << WGM13);
+       TIMSK |= (1 << OCIE1B);
+       
+       // Pin outputs 
+       DDRD = (1 << PIND4) | (1 << PIND3) | (1 << PIND2);
+       DDRB = (1 << PINB4);
+       
+       PORTD = 0x00;
+       sei();
+       
+       // Idle until button 1 is pressed, continously display starttime
+       while (PINB & 2)
+       {
+               
+               display_num_msb(sec, MIDDLE, DP_ON);
+               display_num_msb(ten_sec, LEFT, DP_OFF);
+               display_num_msb(sec_ten, RIGHT, DP_OFF);
+       }
+       
+       // Start timer0 with prescaler of 1024
+       TCCR0B |= (1 << CS02) | (0 << CS01) | (1 << CS00);
+
+       // Start beeping once every 5 seconds
+       set_beep_freq(200);
+       
+       // Start timer1 with prescaler of 64
+       TCCR1B |= (0 << CS12) | (1 << CS11) | (1 << CS10);
+
+       // Mainloop
+    while (1) 
+    {
+               // Turn of dp if detonated
+               if (boom)
+               {
+                       display_num_msb(sec, MIDDLE, DP_OFF);
+               }
+               else
+               {
+                       display_num_msb(sec, MIDDLE, DP_ON);
+               }
+               
+               display_num_msb(ten_sec, LEFT, DP_OFF);
+               display_num_msb(sec_ten, RIGHT, DP_OFF);
+    }
+}
+
+ISR (TIMER1_COMPB_vect)
+{
+       PORTB ^= (1 << PINB4);
+}
+
+ISR (TIMER0_COMPA_vect) {\r
+       \r
+       // Flash on and off after detonation\r
+       if (boom & 1)\r
+       {\r
+               // Flash off
+               //PORTB = (1<< PINB4);
+               ten_sec = DISPLAY_OFF;\r
+               sec = DISPLAY_OFF;\r
+               sec_ten = DISPLAY_OFF;\r
+               \r
+               boom = 2;\r
+       }\r
+       else if (boom & 2)\r
+       {\r
+               PORTB = (0<< PINB4);\r
+               // Flash 0\r
+               ten_sec = 0;\r
+               sec = 0;\r
+               sec_ten = 0;\r
+               \r
+               boom = 1;\r
+       }\r
+       \r
+       // Countdown\r
+       else\r
+       {\r
+               // 0.1 to prevent divide by 0\r
+               set_beep_freq(200.0 * 60.0 / ((10.0 * ten_sec) + sec + 0.1));\r
+               \r
+               if (ten_sec == 0 && sec == 0 && sec_ten) \r
+               {\r
+                       ten_sec = 0;\r
+                       sec = 0;\r
+                       sec_ten = 0;\r
+               \r
+                       // Detonate, slow down timer for flashing\r
+                       boom = 1;\r
+                       OCR0A = 98 * 2;\r
+               }\r
+               else\r
+               {\r
+                       if (sec == 0 && sec_ten == 0)\r
+                       {\r
+                               sec = 9;\r
+                               sec_ten = 9;\r
+                               ten_sec--;\r
+                       }\r
+                       else\r
+                       {\r
+                               if (sec_ten == 0)\r
+                               {\r
+                                       sec_ten = 9;\r
+                                       sec--;\r
+                               }\r
+                               else\r
+                               {\r
+                                       sec_ten--;\r
+                               }\r
+                       }\r
+               }
+       }
+}
+
+void shift_out_msb(uint8_t byte)
+{
+       uint8_t next_bit;
+       for (uint8_t i = 0; i < 8; i++)
+       {
+               next_bit = ((byte >> (7 - i)) & 1);
+
+               if (next_bit)
+               {
+                       PORTD |= (1 << PIND2);
+               }
+               else
+               {
+                       PORTD &= ~(1 << PIND2);
+               }
+               
+               // Toggle SCLK twice to shift out
+               PORTD ^= (1 << PIND4);
+               PORTD ^= (1 << PIND4);
+       }
+}
+
+void display_num_msb(uint16_t number, digit_msb digit_number, decimal_point_msb dp)
+{
+       cli();
+       shift_out_msb((numbers_msb[number] >> 8) & digit_number);
+       shift_out_msb((numbers_msb[number] & 0xff) & dp);
+       
+       // Toggle RCLK twice to latch
+       PORTD ^= (1 << PIND3);
+       PORTD ^= (1 << PIND3);
+       sei();
+}
+
+void set_beep_freq(uint16_t freq_mHz)
+{
+       cli();
+       
+       // Constant sound when frequency gets too high
+       if (freq_mHz >= 100 * BEEP_LENGTH_MS) {
+               turn_off_beep();
+               // PORTB |= (1 << PINB4);
+               return;
+       }
+       
+       // Frequency is determined by TOP[OCR1A]
+       // freq_mHz = (F_CPU * 1000) / ((prescalar + 1) * TOP[OCR1A] * 2)
+       // Lowest frequency without changing prescalar: 0.12Hz
+       
+       OCR1A = (F_CPU * 1000.0) / (65.0 * freq_mHz) / 2.0;
+       
+       // ON-time is determined by COMP[OCR1B]
+       // on_time_ms = 2*(TOP[OCR1A] - COMP[OCR1B]) / (1000 * F_CPU / (prescalar))
+       
+       OCR1B = OCR1A - ((BEEP_LENGTH_MS * (F_CPU / 1000.0)) / (2.0 * 65.0));
+       
+       sei();
+}
+
+void turn_off_beep()
+{
+       // Disable clock to timer
+       TCCR1B &= ~((1 << CS12) | (1 << CS11) | (1 << CS10));
+       
+       PORTB &= ~(0 << PINB4);
+}
\ No newline at end of file

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diff --git a/kicad/dynamit.kicad_pcb b/kicad/dynamit.kicad_pcb
new file mode 100644 (file)
index 0000000..83f92b7
--- /dev/null
+++ b/kicad/dynamit.kicad_pcb
@@ -0,0 +1,6099 @@
+(kicad_pcb (version 20221018) (generator pcbnew)\r
+\r
+  (general\r
+    (thickness 1.6)\r
+  )\r
+\r
+  (paper "A4")\r
+  (layers\r
+    (0 "F.Cu" signal)\r
+    (31 "B.Cu" signal)\r
+    (32 "B.Adhes" user "B.Adhesive")\r
+    (33 "F.Adhes" user "F.Adhesive")\r
+    (34 "B.Paste" user)\r
+    (35 "F.Paste" user)\r
+    (36 "B.SilkS" user "B.Silkscreen")\r
+    (37 "F.SilkS" user "F.Silkscreen")\r
+    (38 "B.Mask" user)\r
+    (39 "F.Mask" user)\r
+    (40 "Dwgs.User" user "User.Drawings")\r
+    (41 "Cmts.User" user "User.Comments")\r
+    (42 "Eco1.User" user "User.Eco1")\r
+    (43 "Eco2.User" user "User.Eco2")\r
+    (44 "Edge.Cuts" user)\r
+    (45 "Margin" user)\r
+    (46 "B.CrtYd" user "B.Courtyard")\r
+    (47 "F.CrtYd" user "F.Courtyard")\r
+    (48 "B.Fab" user)\r
+    (49 "F.Fab" user)\r
+    (50 "User.1" user)\r
+    (51 "User.2" user)\r
+    (52 "User.3" user)\r
+    (53 "User.4" user)\r
+    (54 "User.5" user)\r
+    (55 "User.6" user)\r
+    (56 "User.7" user)\r
+    (57 "User.8" user)\r
+    (58 "User.9" user)\r
+  )\r
+\r
+  (setup\r
+    (stackup\r
+      (layer "F.SilkS" (type "Top Silk Screen"))\r
+      (layer "F.Paste" (type "Top Solder Paste"))\r
+      (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))\r
+      (layer "F.Cu" (type "copper") (thickness 0.035))\r
+      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))\r
+      (layer "B.Cu" (type "copper") (thickness 0.035))\r
+      (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))\r
+      (layer "B.Paste" (type "Bottom Solder Paste"))\r
+      (layer "B.SilkS" (type "Bottom Silk Screen"))\r
+      (copper_finish "None")\r
+      (dielectric_constraints no)\r
+    )\r
+    (pad_to_mask_clearance 0)\r
+    (pcbplotparams\r
+      (layerselection 0x00010fc_ffffffff)\r
+      (plot_on_all_layers_selection 0x0000000_00000000)\r
+      (disableapertmacros false)\r
+      (usegerberextensions false)\r
+      (usegerberattributes true)\r
+      (usegerberadvancedattributes true)\r
+      (creategerberjobfile true)\r
+      (dashed_line_dash_ratio 12.000000)\r
+      (dashed_line_gap_ratio 3.000000)\r
+      (svgprecision 4)\r
+      (plotframeref false)\r
+      (viasonmask false)\r
+      (mode 1)\r
+      (useauxorigin false)\r
+      (hpglpennumber 1)\r
+      (hpglpenspeed 20)\r
+      (hpglpendiameter 15.000000)\r
+      (dxfpolygonmode true)\r
+      (dxfimperialunits true)\r
+      (dxfusepcbnewfont true)\r
+      (psnegative false)\r
+      (psa4output false)\r
+      (plotreference true)\r
+      (plotvalue true)\r
+      (plotinvisibletext false)\r
+      (sketchpadsonfab false)\r
+      (subtractmaskfromsilk false)\r
+      (outputformat 1)\r
+      (mirror false)\r
+      (drillshape 1)\r
+      (scaleselection 1)\r
+      (outputdirectory "")\r
+    )\r
+  )\r
+\r
+  (net 0 "")\r
+  (net 1 "+3V0")\r
+  (net 2 "GND")\r
+  (net 3 "Net-(BZ1-+)")\r
+  (net 4 "Net-(J1-MISO)")\r
+  (net 5 "Net-(J1-SCK)")\r
+  (net 6 "Net-(J1-MOSI)")\r
+  (net 7 "rst")\r
+  (net 8 "Net-(J2-Pin_1)")\r
+  (net 9 "Net-(J2-Pin_2)")\r
+  (net 10 "Net-(J2-Pin_3)")\r
+  (net 11 "Net-(J2-Pin_4)")\r
+  (net 12 "Net-(J2-Pin_5)")\r
+  (net 13 "Net-(J2-Pin_8)")\r
+  (net 14 "Net-(J2-Pin_9)")\r
+  (net 15 "Net-(J2-Pin_10)")\r
+  (net 16 "Net-(J2-Pin_11)")\r
+  (net 17 "Net-(J2-Pin_12)")\r
+  (net 18 "Net-(Q1-B)")\r
+  (net 19 "Net-(Q2-B)")\r
+  (net 20 "Net-(Q3-B)")\r
+  (net 21 "Net-(Q4-B)")\r
+  (net 22 "Net-(U3-QH)")\r
+  (net 23 "Net-(U3-QE)")\r
+  (net 24 "Net-(U3-QD)")\r
+  (net 25 "Net-(J3-Pin_1)")\r
+  (net 26 "Net-(U1-PB4)")\r
+  (net 27 "unconnected-(U2-QH-Pad7)")\r
+  (net 28 "Net-(U2-QH')")\r
+  (net 29 "Net-(J4-Pin_1)")\r
+  (net 30 "unconnected-(U1-PD0-Pad2)")\r
+  (net 31 "unconnected-(U1-PD1-Pad3)")\r
+  (net 32 "unconnected-(U2-QA-Pad15)")\r
+  (net 33 "unconnected-(U3-QB-Pad1)")\r
+  (net 34 "unconnected-(U1-PA1{slash}XTAL2-Pad4)")\r
+  (net 35 "unconnected-(U1-PA0{slash}XTAL1-Pad5)")\r
+  (net 36 "Net-(U1-PD2)")\r
+  (net 37 "unconnected-(U3-QA-Pad15)")\r
+  (net 38 "Net-(U2-QB)")\r
+  (net 39 "Net-(U2-QC)")\r
+  (net 40 "Net-(U2-QD)")\r
+  (net 41 "Net-(U2-QE)")\r
+  (net 42 "Net-(U2-QF)")\r
+  (net 43 "Net-(U3-QF)")\r
+  (net 44 "Net-(U3-QC)")\r
+  (net 45 "unconnected-(U2-QG-Pad6)")\r
+  (net 46 "Net-(U3-QG)")\r
+  (net 47 "unconnected-(U3-QH'-Pad9)")\r
+  (net 48 "Net-(U1-PD3)")\r
+  (net 49 "Net-(U1-PD4)")\r
+  (net 50 "unconnected-(U1-PD5-Pad9)")\r
+  (net 51 "unconnected-(U1-PD6-Pad11)")\r
+  (net 52 "unconnected-(U1-PB2-Pad14)")\r
+  (net 53 "unconnected-(U1-PB3-Pad15)")\r
+  (net 54 "Net-(J2-Pin_7)")\r
+\r
+  (footprint "Package_TO_SOT_THT:TO-92L_Inline_Wide" (layer "F.Cu")\r
+    (tstamp 191716d9-8f9e-410a-bce6-dd3f5abe72ce)\r
+    (at 140.266 157.978 -90)\r
+    (descr "TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf)")\r
+    (tags "TO-92L Inline Wide transistor")\r
+    (property "Sheetfile" "dynamit.kicad_sch")\r
+    (property "Sheetname" "")\r
+    (property "Sim.Device" "PNP")\r
+    (property "Sim.Pins" "1=C 2=B 3=E")\r
+    (property "Sim.Type" "GUMMELPOON")\r
+    (property "ki_description" "Bipolar transistor symbol for simulation only, substrate tied to the emitter")\r
+    (property "ki_keywords" "simulation")\r
+    (path "/9f060f8f-965b-4354-850a-2e8b8a9099a1")\r
+    (attr through_hole)\r
+    (fp_text reference "Q1" (at 2.54 -3.56 90) (layer "F.SilkS")\r
+        (effects (font (size 1 1) (thickness 0.15)))\r
+      (tstamp 2803c32f-cd2a-4bbe-a099-8fc8f6d6c470)\r
+    )\r
+    (fp_text value "PNP" (at 2.54 2.79 90) (layer "F.Fab")\r
+        (effects (font (size 1 1) (thickness 0.15)))\r
+      (tstamp af1b6aa8-b78f-4a6c-acfd-429980fb051e)\r
+    )\r
+    (fp_text user "${REFERENCE}" (at 2.54 0 90) (layer "F.Fab")\r
+        (effects (font (size 1 1) (thickness 0.15)))\r
+      (tstamp dc34b0d2-ea3a-43a0-ace4-15942e0aaca6)\r
+    )\r
+    (fp_line (start 0.6 1.7) (end 4.45 1.7)\r
+      (stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp 2f455b9c-4029-4754-8ad9-4826b221612b))\r
+    (fp_arc (start 0.1836 -1.098807) (mid 1.143021 -2.192817) (end 2.54 -2.6)\r
+      (stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp 9c27b300-192c-4145-80c8-607c939c6cf2))\r
+    (fp_arc (start 0.6 1.7) (mid 0.389183 1.423933) (end 0.217369 1.122045)\r
+      (stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp bccb70b5-0f08-436e-8c59-a8a9c7e7fd48))\r
+    (fp_arc (start 2.54 -2.6) (mid 3.936979 -2.192818) (end 4.8964 -1.098807)\r
+      (stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp c8b9f539-a8cf-4823-89cc-ecf81fa564cf))\r
+    (fp_arc (start 4.842383 1.112264) (mid 4.666594 1.419753) (end 4.45 1.7)\r
+      (stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp 03e174ce-1332-4502-8925-fa3b197e77ec))\r
+    (fp_line (start -1 -2.75) (end -1 1.85)\r
+      (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp b1d313a2-f865-4b9f-befe-aef698689a0b))\r
+    (fp_line (start -1 -2.75) (end 6.1 -2.75)\r
+      (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 8b2706c1-d007-4a42-b4f7-f66dbd5124c3))\r
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diff --git a/kicad/dynamit.kicad_prl b/kicad/dynamit.kicad_prl
new file mode 100644 (file)
index 0000000..4577ff1
--- /dev/null
+++ b/kicad/dynamit.kicad_prl
@@ -0,0 +1,77 @@
+{
+  "board": {
+    "active_layer": 31,
+    "active_layer_preset": "All Layers",
+    "auto_track_width": false,
+    "hidden_netclasses": [],
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "images": 0.6,
+      "pads": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      0,
+      1,
+      2,
+      3,
+      4,
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+      40
+    ],
+    "visible_layers": "fffffff_ffffffff",
+    "zone_display_mode": 0
+  },
+  "meta": {
+    "filename": "dynamit.kicad_prl",
+    "version": 3
+  },
+  "project": {
+    "files": []
+  }
+}

diff --git a/kicad/dynamit.kicad_pro b/kicad/dynamit.kicad_pro
new file mode 100644 (file)
index 0000000..a48616b
--- /dev/null
+++ b/kicad/dynamit.kicad_pro
@@ -0,0 +1,498 @@
+{
+  "board": {
+    "3dviewports": [],
+    "design_settings": {
+      "defaults": {
+        "board_outline_line_width": 0.09999999999999999,
+        "copper_line_width": 0.19999999999999998,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.049999999999999996,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": false,
+          "text_position": 0,
+          "units_format": 1
+        },
+        "fab_line_width": 0.09999999999999999,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.15,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 1.0,
+          "height": 1.5,
+          "width": 1.8
+        },
+        "silk_line_width": 0.15,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15,
+        "silk_text_upright": false,
+        "zones": {
+          "min_clearance": 0.6
+        }
+      },
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        }
+      ],
+      "drc_exclusions": [],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "connection_width": "warning",
+        "copper_edge_clearance": "error",
+        "copper_sliver": "warning",
+        "courtyards_overlap": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint": "error",
+        "footprint_type_mismatch": "ignore",
+        "hole_clearance": "error",
+        "hole_near_hole": "error",
+        "invalid_outline": "error",
+        "isolated_copper": "warning",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "lib_footprint_issues": "warning",
+        "lib_footprint_mismatch": "warning",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "warning",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "error",
+        "silk_edge_clearance": "warning",
+        "silk_over_copper": "warning",
+        "silk_overlap": "warning",
+        "skew_out_of_range": "error",
+        "solder_mask_bridge": "error",
+        "starved_thermal": "error",
+        "text_height": "warning",
+        "text_thickness": "warning",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_dangling": "warning",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "warning",
+        "zones_intersect": "error"
+      },
+      "rules": {
+        "max_error": 0.005,
+        "min_clearance": 0.0,
+        "min_connection": 0.0,
+        "min_copper_edge_clearance": 0.0,
+        "min_hole_clearance": 0.25,
+        "min_hole_to_hole": 0.25,
+        "min_microvia_diameter": 0.19999999999999998,
+        "min_microvia_drill": 0.09999999999999999,
+        "min_resolved_spokes": 2,
+        "min_silk_clearance": 0.0,
+        "min_text_height": 0.7999999999999999,
+        "min_text_thickness": 0.08,
+        "min_through_hole_diameter": 0.3,
+        "min_track_width": 0.0,
+        "min_via_annular_width": 0.09999999999999999,
+        "min_via_diameter": 0.5,
+        "solder_mask_clearance": 0.0,
+        "solder_mask_min_width": 0.0,
+        "solder_mask_to_copper_clearance": 0.0,
+        "use_height_for_length_calcs": true
+      },
+      "teardrop_options": [
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 5,
+          "td_on_pad_in_zone": false,
+          "td_onpadsmd": true,
+          "td_onroundshapesonly": false,
+          "td_ontrackend": false,
+          "td_onviapad": true
+        }
+      ],
+      "teardrop_parameters": [
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_round_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_rect_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_track_end",
+          "td_width_to_size_filter_ratio": 0.9
+        }
+      ],
+      "track_widths": [
+        0.0,
+        0.0,
+        0.0,
+        0.4,
+        0.6,
+        1.0,
+        1.5,
+        2.0,
+        3.0
+      ],
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        }
+      ],
+      "zones_allow_external_fillets": false
+    },
+    "layer_presets": [],
+    "viewports": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
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+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "conflicting_netclasses": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "endpoint_off_grid": "warning",
+      "extra_units": "error",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "lib_symbol_issues": "warning",
+      "missing_bidi_pin": "warning",
+      "missing_input_pin": "warning",
+      "missing_power_pin": "error",
+      "missing_unit": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "similar_labels": "warning",
+      "simulation_model_issue": "error",
+      "unannotated": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "dynamit.kicad_pro",
+    "version": 1
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12,
+        "clearance": 0.6,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.6,
+        "via_diameter": 1.8,
+        "via_drill": 1.0,
+        "wire_width": 6
+      }
+    ],
+    "meta": {
+      "version": 3
+    },
+    "net_colors": null,
+    "netclass_assignments": null,
+    "netclass_patterns": []
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "",
+      "specctra_dsn": "",
+      "step": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "drawing": {
+      "dashed_lines_dash_length_ratio": 12.0,
+      "dashed_lines_gap_length_ratio": 3.0,
+      "default_line_thickness": 6.0,
+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.375,
+      "pin_symbol_size": 25.0,
+      "text_offset_ratio": 0.15
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "",
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "spice_current_sheet_as_root": false,
+    "spice_external_command": "spice \"%I\"",
+    "spice_model_current_sheet_as_root": true,
+    "spice_save_all_currents": false,
+    "spice_save_all_voltages": false,
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "e7f09fe2-0269-45fa-ac08-1e6d20246e02",
+      ""
+    ]
+  ],
+  "text_variables": {}
+}

diff --git a/kicad/dynamit.kicad_sch b/kicad/dynamit.kicad_sch
new file mode 100644 (file)
index 0000000..1eddbc3
--- /dev/null
+++ b/kicad/dynamit.kicad_sch
@@ -0,0 +1,3178 @@
+(kicad_sch (version 20230121) (generator eeschema)\r
+\r
+  (uuid e7f09fe2-0269-45fa-ac08-1e6d20246e02)\r
+\r
+  (paper "A4")\r
+\r
+  (lib_symbols\r
+    (symbol "74xx:74HC595" (in_bom yes) (on_board yes)\r
+      (property "Reference" "U" (at -7.62 13.97 0)\r
+        (effects (font (size 1.27 1.27)))\r
+      )\r
+      (property "Value" "74HC595" (at -7.62 -16.51 0)\r
+        (effects (font (size 1.27 1.27)))\r
+      )\r
+      (property "Footprint" "" (at 0 0 0)\r
+        (effects (font (size 1.27 1.27)) hide)\r
+      )\r
+      (property "Datasheet" "http://www.ti.com/lit/ds/symlink/sn74hc595.pdf" (at 0 0 0)\r
+        (effects (font (size 1.27 1.27)) hide)\r
+      )\r
+      (property "ki_keywords" "HCMOS SR 3State" (at 0 0 0)\r
+        (effects (font (size 1.27 1.27)) hide)\r
+      )\r
+      (property "ki_description" "8-bit serial in/out Shift Register 3-State Outputs" (at 0 0 0)\r
+        (effects (font (size 1.27 1.27)) hide)\r
+      )\r
+      (property "ki_fp_filters" "DIP*W7.62mm* SOIC*3.9x9.9mm*P1.27mm* TSSOP*4.4x5mm*P0.65mm* SOIC*5.3x10.2mm*P1.27mm* SOIC*7.5x10.3mm*P1.27mm*" (at 0 0 0)\r
+        (effects (font (size 1.27 1.27)) hide)\r
+      )\r
+      (symbol "74HC595_1_0"\r
+        (pin tri_state line (at 10.16 7.62 180) (length 2.54)\r
+          (name "QB" (effects (font (size 1.27 1.27))))\r
+          (number "1" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin input line (at -10.16 2.54 0) (length 2.54)\r
+          (name "~{SRCLR}" (effects (font (size 1.27 1.27))))\r
+          (number "10" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin input line (at -10.16 5.08 0) (length 2.54)\r
+          (name "SRCLK" (effects (font (size 1.27 1.27))))\r
+          (number "11" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin input line (at -10.16 -2.54 0) (length 2.54)\r
+          (name "RCLK" (effects (font (size 1.27 1.27))))\r
+          (number "12" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin input line (at -10.16 -5.08 0) (length 2.54)\r
+          (name "~{OE}" (effects (font (size 1.27 1.27))))\r
+          (number "13" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin input line (at -10.16 10.16 0) (length 2.54)\r
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+          (number "14" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin tri_state line (at 10.16 10.16 180) (length 2.54)\r
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+          (number "15" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin power_in line (at 0 15.24 270) (length 2.54)\r
+          (name "VCC" (effects (font (size 1.27 1.27))))\r
+          (number "16" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin tri_state line (at 10.16 5.08 180) (length 2.54)\r
+          (name "QC" (effects (font (size 1.27 1.27))))\r
+          (number "2" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin tri_state line (at 10.16 2.54 180) (length 2.54)\r
+          (name "QD" (effects (font (size 1.27 1.27))))\r
+          (number "3" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin tri_state line (at 10.16 0 180) (length 2.54)\r
+          (name "QE" (effects (font (size 1.27 1.27))))\r
+          (number "4" (effects (font (size 1.27 1.27))))\r
+        )\r
+        (pin tri_state line (at 10.16 -2.54 180) (length 2.54)\r
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+        )\r
+        (pin tri_state line (at 10.16 -5.08 180) (length 2.54)\r
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+          (number "6" (effects (font (size 1.27 1.27))))\r
+        )\r
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